h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 422

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h8s-2161b

Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 15 Serial Communication Interface (SCI and IrDA)
15.3.8
SCMR selects SCI functions and its format.
Bit
7 to
4
3
2
1
0
Rev. 3.00 Mar 21, 2006 page 368 of 788
REJ09B0300-0300
Bit Name
SDIR
SINV
SMIF
Serial Interface Mode Register (SCMR)
Initial Value
All 1
0
0
1
0
R/W
R
R/W
R/W
R
R/W
Description
Reserved
These bits are always read as 1 and cannot be
modified.
Data Transfer Direction
Selects the serial/parallel conversion format.
0: TDR contents are transmitted with LSB-first.
Receive data is stored as LSB first in RDR.
1: TDR contents are transmitted with MSB-first.
Receive data is stored as MSB first in RDR.
The SDIR bit is valid only when the 8-bit data format
is used for transmission/reception; when the 7-bit
data format is used, data is always
transmitted/received with LSB-first.
Data Invert
Specifies inversion of the data logic level. The SINV
bit does not affect the logic level of the parity bit.
When the parity bit is inverted, invert the O/E bit in
SMR.
0: TDR contents are transmitted as they are.
1: TDR contents are inverted before being
Reserved
This bit is always read as 1 and cannot be modified.
Serial Communication Interface Mode Select:
0: Normal asynchronous or clocked synchronous
1: Reserved mode
Receive data is stored as it is in RDR.
transmitted. Receive data is stored in inverted
form in RDR.
mode

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