h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 551
h8s-2161b
Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
1.H8S-2161B.pdf
(845 pages)
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17.4.2
In a transmit operation, KCLK (clock) is an output on the keyboard side, and KD (data) is an
output on the chip (system) side. KD outputs a start bit, 8 data bits (LSB-first), an odd parity bit,
and a stop bit, in that order. The KD value is valid when KCLK is high. A sample transmit
processing flowchart is shown in figure 17.5, and the transmit timing in figure 17.6.
KCLK
(pin state)
KD
(pin state)
KCLK
(input)
KCLK
(output)
KB7 to KB0
PER
KBS
KBF
Transmit Operation
[1] [2] [3]
Previous data
Start
bit
1
0
2
KB0
Figure 17.4 Receive Timing
1
3
KB1
7
9
Parity bit
Rev. 3.00 Mar 21, 2006 page 497 of 788
10
Section 17 Keyboard Buffer Controller
Receive data
Stop bit
[4] [5]
11
Automatic I/O inhibit
Receive processing/
error handling
REJ09B0300-0300
Flag cleared
[6]
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