HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 198
HD6417144
Manufacturer Part Number
HD6417144
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417144.pdf
(930 pages)
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9. Bus State Controller (BSC)
9.6
A strobe signal is output in external space accesses to provide primarily for SRAM or ROM direct
connections.
9.6.1
External access bus cycles are performed in 2 states. Figure 9.3 shows the basic timing of external
space access.
During a read, irrespective of operand size, all bits in the data bus width for the access space
(address) accessed by RD signal are fetched by the LSI.
During a write, the WRHH (bits 31 to 24), the WRHL (bits 23 to 16), the WRH (bits 15 to 8), and
the WRL (bits 7 to 0) signal indicate the byte location to be written.
Rev.4.00 Mar. 27, 2008 Page 154 of 882
REJ09B0108-0400
Accessing External Space
Basic Timing
Figure 9.3 Basic Timing of External Space Access
Write
Read
Address
DACK
WRxx
Data
Data
CSn
CK
RD
T1
T2
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