HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 73
HD6417144
Manufacturer Part Number
HD6417144
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417144.pdf
(930 pages)
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2.4.3
The instruction formats and the meaning of source and destination operand are described below.
The meaning of the operand depends on the instruction code. The symbols used are as follows:
• xxxx: Instruction code
• mmmm: Source register
• nnnn: Destination register
• iiii: Immediate data
• dddd: Displacement
Table 2.9
Instruction Formats
0 format
15
n format
15
m format
15
xxxx
xxxx
xxxx
mmmm
xxxx
nnnn
Instruction Format
Instruction Formats
xxxx
xxxx
xxxx
xxxx
xxxx
xxxx
0
0
0
Source
Operand
—
—
Control register or
system register
Control register or
system register
mmmm: Direct
register
mmmm: Indirect
post-increment
register
mmmm: Indirect
register
mmmm: PC relative
using Rm
Rev.4.00 Mar. 27, 2008 Page 29 of 882
Destination
Operand
—
nnnn: Direct
register
nnnn: Direct
register
nnnn: Indirect pre-
decrement register
Control register or
system register
Control register or
system register
—
—
Example
NOP
MOVT
STS
STC.L SR,@-Rn
LDC
LDC.L @Rm+,SR
JMP
BRAF
REJ09B0108-0400
Rn
MACH,Rn
Rm,SR
@Rm
Rm
2. CPU
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