HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 365
HD6417144
Manufacturer Part Number
HD6417144
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417144.pdf
(930 pages)
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11.7
11.7.1
MTU operation can be disabled or enabled using the module standby register. The initial setting is
for MTU operation to be halted. Register access is enabled by clearing module standby mode. For
details, refer to section 24, Power-Down Modes.
11.7.2
The input clock pulse width must be at least 1.5 states in the case of single-edge detection, and at
least 2.5 states in the case of both-edge detection. The MTU will not operate properly at narrower
pulse widths.
In phase counting mode, the phase difference and overlap between the two input clocks must be at
least 1.5 states, and the pulse width must be at least 2.5 states. Figure 11.70 shows the input clock
conditions in phase counting mode.
Figure 11.70
TCLKA
(TCLKC)
TCLKB
(TCLKD)
Notes: Phase difference and overlap
Usage Notes
Module Standby Mode Setting
Input Clock Restrictions
Pulse width
Phase Difference, Overlap, and Pulse Width in Phase Counting Mode
Overlap
Pulse width
Phase
differ-
ence
Overlap
: 1.5 states or more
: 2.5 states or more
Phase
differ-
ence
Pulse width
11.
Rev.4.00 Mar. 27, 2008 Page 321 of 882
Pulse width
Multi-Function Timer Pulse Unit (MTU)
Pulse width
REJ09B0108-0400
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