HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 479

• Manufacturer Part Number: HD6417144
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

No
No
Read receive data in RDR, and
clear RDRF flag in SSR to 0
Figure 13.9 Sample Serial Reception Data Flowchart (1)
Read RDRF flag in SSR
Clear RE bit in SCR to 0
Read ORER, PER, and
PER∨FER∨ORER = 1
All data received?
FER flags in SSR
Start reception
Initialization
RDRF = 1
<End>
Yes
Yes
No
(Continued on next page)
Error processing
Yes
[1]
[2]
[4]
[5]
[3]
[1] SCI initialization:
[2] [3] Receive error processing and break
[4] SCI status check and receive data read:
[5] Serial reception continuation procedure:
13. Serial Communication Interface (SCI)
Rev.4.00 Mar. 27, 2008 Page 435 of 882
Set the RxD pin using the PFC.
detection:
If a receive error occurs, read the
ORER, PER, and FER flags in SSR to
identify the error. After performing the
appropriate error processing, ensure
that the ORER, PER, and FER flags are
all cleared to 0. Reception cannot be
resumed if any of these flags are set to
1. In the case of a framing error, a
break can be detected by reading the
value of the input port corresponding to
the RxD pin.
Read SSR and check that RDRF = 1,
then read the receive data in RDR and
clear the RDRF flag to 0. Transition of
the RDRF flag from 0 to 1 can also be
identified by an RXI interrupt.
To continue serial reception, before the
stop bit for the current frame is
received, read the RDRF flag, read
RDR, and clear the RDRF flag to 0.
The RDRF flag is cleared automatically
when DMAC or DTC is activated by an
RXI interrupt and the RDR value is
read.
REJ09B0108-0400