HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 739
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HD6417144
Manufacturer Part Number
HD6417144
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417144.pdf
(930 pages)
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22.2
Table 22.1 shows the H-UDI pin configuration.
Table 22.1 H-UDI Pins
Pin Name
Test clock
Test mode
select
Test data
input
Test data
output
Test reset
Input/Output Pins
Abbreviation
TCK
TMS
TDI
TDO
TRST
Input
Input
Input
Output
Input
I/O
TCK supplies an independent clock to the H-UDI. As
the clock input to TCK is supplied directly to the H-UDI,
a clock waveform with a duty cycle close to 50%
should be input (see section 26, Electrical
Characteristics, for details).
Test Mode Select Input Signal
TMS is sampled at the rising edge of TCK. TMS
controls the internal state of the TAP controller.
Serial Data Input
TDI performs serial input of instructions and data to H-
UDI registers. TDI is sampled at the rising edge of
TCK.
Serial Data Output
TDO performs serial output of instructions and data
from H-UDI registers. Transfer is synchronized with
TCK. When no signal is being output, TDO goes to the
high-impedance state.
Test Reset Input Signal
TRST is used to initialize the H-UDI asynchronously.
Function
Test Clock Input
Rev.4.00 Mar. 27, 2008 Page 695 of 882
22. User Debugging Interface (H-UDI)
REJ09B0108-0400
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