HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 70

• Manufacturer Part Number: HD6417144
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

2. CPU
Rev.4.00 Mar. 27, 2008 Page 26 of 882
REJ09B0108-0400
Addressing
Mode
Indirect register
addressing with
displacement
Indirect indexed
register
addressing
Indirect GBR
addressing with
displacement
Indirect indexed
GBR
addressing
Instruction
Format
@(disp:4,
Rn)
@(R0, Rn) The effective address is the sum of Rn and R0.
@(disp:8,
GBR)
@(R0,
GBR)
Effective Address Calculation
The effective address is the sum of Rn and a 4-bit
displacement (disp). The value of disp is zero-
extended, and remains unchanged for a byte
operation, is doubled for a word operation, and is
quadrupled for a longword operation.
The effective address is the sum of GBR value and
an 8-bit displacement (disp). The value of disp is
zero-extended, and remains unchanged for a byte
operation, is doubled for a word operation, and is
quadrupled for a longword operation.
The effective address is the sum of GBR value and
R0.
(zero-extended)
(zero-extended)
GBR
1/2/4
Rn
R0
R0
GBR
1/2/4
disp
disp
Rn
×
×
+
+
+
+
Rn + disp × 1/2/4
GBR + R0
+ disp × 1/2/4
Rn + R0
GBR
Equation
Byte:
Rn + disp
Word:
Rn + disp × 2
Longword:
Rn + disp × 4
Rn + R0
Byte:
GBR + disp
Word:
GBR + disp × 2
Longword:
GBR + disp × 4
GBR + R0