HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 554

• Manufacturer Part Number: HD6417144
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

14. I
Rev.4.00 Mar. 27, 2008 Page 510 of 882
REJ09B0108-0400
Figure 14.17 Example: Flowchart of Operations in the Slave Receive Mode (HNDS = 1)
2
C Bus Interface (IIC) Option
Read AASX, AAS, and ADZ flags in ICSR
Set MST = 0 and TRS = 0 (ICCR)
No
No
No
Read the IRIC flag in ICCR
Clear the IRIC flag in ICCR
Clear the IRIC flag in ICCR
Clear the IRIC flag in ICCR
Read the IRIC flag in ICCR
Clear the IRIC flag in ICCR
Read the IRIC flag in ICCR
Read ICDR and clear IRIC
Read the TRS bit in ICCR
and HNDS = 1 (SCRX)
Set ACKB = 0 (ICSR)
Set ACKB = 1 (ICSR)
Final reception?
Set initial value
and ADZ = 1?
ICDRF = 1?
Read ICDR
Read ICDR
IRIC = 1?
IRIC = 1?
TRS = 1?
IRIC = 1?
AAS = 1
Start
End
Yes
Yes
Yes
Yes
No
No
No
Yes
No
Yes
Yes
[1] Initial setting. Set slave receive mode.
[2] Read remained receive data.
[3] to [7] Wait for one byte to be received (slave address + R/W).
[8] Clear the IRIC flag.
[10] Read receive data. The first read is a dummy read.
[5] to [7] Wait for completion of reception.
[8] Clear the IRIC flag.
[9] Set acknowledge data for the final reception.
[10] Read receive data.
[11] Detect stop condition.
[12] Clear the IRIC flag.
General call address processing
Slave transmit mode
* Description omitted