HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 303
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HD6417144
Manufacturer Part Number
HD6417144
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet
1.HD6417144.pdf
(930 pages)
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11.4
11.4.1
Each channel has a TCNT and TGR register. TCNT performs up-counting, and is also capable of
free-running operation, synchronous counting, and external event counting.
Each TGR can be used as an input capture register or output compare register.
Always select MTU external pins set function using the pin function controller (PFC).
Counter Operation:
When one of bits CST0 to CST4 is set to 1 in TSTR, the TCNT counter for the corresponding
channel begins counting. TCNT can operate as a free-running counter, periodic counter, for
example.
1. Example of Count Operation Setting Procedure
Figure 11.3 shows an example of the count operation setting procedure.
Operation
Basic Functions
Select counter clearing
Select output compare
Start count operation
Select counter clock
Operation selection
<Periodic counter>
Periodic counter
Figure 11.3
Set period
register
source
Example of Counter Operation Setting Procedure
[1]
[2]
[3]
[4]
[5]
<Free-running counter>
Free-running counter
Start count operation
11.
Rev.4.00 Mar. 27, 2008 Page 259 of 882
[5]
Multi-Function Timer Pulse Unit (MTU)
[1] Select the counter clock
[2] For periodic counter
[3] Designate the TGR
[4] Set the periodic counter
[5] Set the CST bit in TSTR to
with bits TPSC2 to TPSC0
in TCR. At the same time,
select the input clock edge
with bits CKEG1 and
CKEG0 in TCR.
operation, select the TGR
to be used as the TCNT
clearing source with bits
CCLR2 to CCLR0 in TCR.
selected in [2] as an output
compare register by means
of TIOR.
cycle in the TGR selected
in [2].
1 to start the counter
operation.
REJ09B0108-0400
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