HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 589

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HD6417144

Manufacturer Part Number
HD6417144
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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15.3.2
ADCSR for each module controls A/D conversion operations.
Bit
7
6
5
4
3
2
Bit Name Initial Value
ADF
ADIE
ADM
A/D Control/Status Register_0, 1 (ADCSR_0, ADCSR_1)
0
0
0
0
1
0
R/W
R/(W)*
R/W
R
R/W
R
R
Description
A/D End Flag
A status flag that indicates the end of A/D conversion.
[Setting conditions]
[Clearing conditions]
A/D Interrupt Enable
The A/D conversion end interrupt (ADI) request is
enabled when 1 is set
When changing the operating mode, first clear the
ADST bit in the A/D control registers (ADCR) to 0.
Reserved
This bit is always read as 0. The write value should
always be 0.
A/D Operating Mode Select
Selects the A/D conversion mode.
0: Single mode
1: Scan mode
When changing the operating mode, first clear the
ADST bit in the A/D control registers (ADCR) to 0.
Reserved
This bit is always read as 1. The write value should
always be 1.
Reserved
This bit is always read as 0. The write value should
always be 0.
When A/D conversion ends in single mode
When A/D conversion ends on all specified
channels in scan mode
When 0 is written after reading ADF = 1
When the DMAC or the DTC is activated by an
ADI interrupt and data is read from ADDR while
the DTMR bit in the DTC is cleared to 0
Rev.4.00 Mar. 27, 2008 Page 545 of 882
15. A/D Converter
REJ09B0108-0400

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