HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 311

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HD6417144

Manufacturer Part Number
HD6417144
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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• When TGR is an output compare register
• When TGR is an input capture register
Example of Buffer Operation Setting Procedure: Figure 11.15 shows an example of the buffer
operation setting procedure.
When a compare match occurs, the value in the buffer register for the corresponding channel is
transferred to the timer general register.
This operation is illustrated in figure 11.13.
When input capture occurs, the value in TCNT is transferred to TGR and the value previously
held in the timer general register is transferred to the buffer register.
This operation is illustrated in figure 11.14.
Figure 11.15
Select TGR function
Set buffer operation
Input capture
signal
<Buffer operation>
Buffer operation
register
Buffer
register
Buffer
Start count
Figure 11.13
Figure 11.14
Example of Buffer Operation Setting Procedure
[1]
[2]
[3]
Compare match signal
Compare Match Buffer Operation
Timer general
Input Capture Buffer Operation
register
Timer general
[1] Designate TGR as an input capture register or
[2] Designate TGR for buffer operation with bits
[3] Set the CST bit in TSTR to 1 start the count
register
output compare register by means of TIOR.
BFA and BFB in TMDR.
operation.
11.
Rev.4.00 Mar. 27, 2008 Page 267 of 882
Comparator
Multi-Function Timer Pulse Unit (MTU)
TCNT
TCNT
REJ09B0108-0400

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