HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 348

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HD6417144

Manufacturer Part Number
HD6417144
Description
32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
Manufacturer
RENESAS [Renesas Technology Corp]
Datasheet

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11.
10. Complementary PWM Mode 0% and 100% Duty Output:
11. Toggle Output Synchronized with PWM Cycle
Rev.4.00 Mar. 27, 2008 Page 304 of 882
REJ09B0108-0400
Figure 11.48
In complementary PWM mode, 0% and 100% duty cycles can be output as required. Figures
11.43 to 11.47 show output examples.
100% duty output is performed when the data register value is set to H'0000. The waveform in
this case has a positive phase with a 100% on-state. 0% duty output is performed when the data
register value is set to the same value as TGRA_3. The waveform in this case has a positive
phase with a 100% off-state.
On and off compare-matches occur simultaneously, but if a turn-on compare-match and turn-
off compare-match for the same phase occur simultaneously, both compare-matches are
ignored and the waveform does not change.
In complementary PWM mode, toggle output can be performed in synchronization with the
PWM carrier cycle by setting the PSYE bit to 1 in the timer output control register (TOCR).
An example of a toggle output waveform is shown in figure 11.48.
This output is toggled by a compare-match between TCNT_3 and TGRA_3 and a compare-
match between TCNT4 and H'0000.
The output pin for this toggle output is the TIOC3A pin. The initial output is 1.
Multi-Function Timer Pulse Unit (MTU)
Toggle output
TIOC3A pin
TGRA_3
H'0000
Example of Toggle Output Waveform Synchronized with PWM Output
TCNT_4
TCNT_3

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