HD6417144 RENESAS [Renesas Technology Corp], HD6417144 Datasheet - Page 501

• Manufacturer Part Number: HD6417144
• Description: 32-Bit RISC Microcomputer SuperHTM RISC engine Family/SH7144 Series
• Manufacturer: RENESAS [Renesas Technology Corp]

The timing for setting the TEND flag depends on the value of the GM bit in SMR. The TEND flag
generation timing is shown in figure 13.27.
TDRE
TEND
FER/ERS
Ds
Figure 13.27 TEND Flag Generation Timing in Transmit Operation
I/O data
TXI
(TEND interrupt)
Transfer to TSR from TDR
When GM = 1
When GM = 0
[Legend]
D0 D1 D2 D3 D4 D5 D6 D7 Dp DE
Ds:
D0 to D7:
Dp:
DE:
Figure 13.26 Retransfer Operation in SCI Transmit Mode
nth transfer frame
Start bit
Data bits
Parity bit
Error signal
Ds
D0
D1
D2
Ds D0 D1 D2 D3 D4 D5 D6 D7 Dp
D3
Transfer to TSR from TDR
11.0etu
12.5etu
D4
D5
Retransferred frame
13. Serial Communication Interface (SCI)
Rev.4.00 Mar. 27, 2008 Page 457 of 882
D6
D7
Dp
Guard
(DE)
time
DE
Ds D0 D1 D2 D3 D4
REJ09B0108-0400
Transfer to TSR
Transfer
frame n+1
from TDR