ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 1029

KIT EVAL FOR AT91SAM3U CORTEX

ATSAM3U-EK

Manufacturer Part Number
ATSAM3U-EK
Description
KIT EVAL FOR AT91SAM3U CORTEX
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of ATSAM3U-EK

Contents
Board
Processor To Be Evaluated
SAM3U
Data Bus Width
32 bit
Interface Type
RS-232, USB
Operating Supply Voltage
3 V
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
SAM3U4E
Silicon Family Name
SAM3U
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT91SAM3U
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3U-EK
Manufacturer:
Atmel
Quantity:
10
Figure 40-9. DMAC Transfer Flow for Linked List Source Address and Contiguous Destination Address
40.3.6
6430D–ATARM–25-Mar-11
Disabling a Channel Prior to Transfer Completion
Under normal operation, software enables a channel by writing a ‘1’ to the Channel Handler
Enable Register, DMAC_CHER.ENABLE[n], and hardware disables a channel on transfer com-
pletion by clearing the DMAC_CHSR.ENABLE[n] register bit.
The recommended way for software to disable a channel without losing data is to use the SUS-
PEND[n] bit in conjunction with the EMPTY[n] bit in the Channel Handler Status Register.
Buffer Complete interrupt
HDMA Transfer Complete
interrupt generated here
generated here
SADDRx, CTRLAx,CTRLBx, DSCRx
Hardware reprograms
HDMA buffer transfer
Channel Enabled by
Writeback of control
Channel Disabled by
information of LLI
Is HDMA in
LLI Fetch
Row 1 ?
software
hardware
yes
no
SAM3U Series
1029

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