ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 434

KIT EVAL FOR AT91SAM3U CORTEX

ATSAM3U-EK

Manufacturer Part Number
ATSAM3U-EK
Description
KIT EVAL FOR AT91SAM3U CORTEX
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of ATSAM3U-EK

Contents
Board
Processor To Be Evaluated
SAM3U
Data Bus Width
32 bit
Interface Type
RS-232, USB
Operating Supply Voltage
3 V
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
SAM3U4E
Silicon Family Name
SAM3U
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT91SAM3U
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3U-EK
Manufacturer:
Atmel
Quantity:
10
1 (BYTE_WRITE): Byte write access type:
0 (BYTE_SELECT): Byte select access type:
• DBW: Data Bus Width
• TDF_CYCLES: Data Float Time
This field gives the integer number of clock cycles required by the external device to release the data after the rising edge
of the read controlling signal. The SMC always provide one full cycle of bus turnaround after the TDF_CYCLES period. The
external bus cannot be used by another chip select during TDF_CYCLES + 1 cycles. From 0 up to 15 TDF_CYCLES can
be set.
• TDF_MODE: TDF Optimization
1: TDF optimization is enabled.
0: TDF optimization is disabled.
434
434
– Write operation is controlled using NCS, NWR0, NWR1.
– Read operation is controlled using NCS and NRD.
– Write operation is controlled using NCS, NWE, NBS0, NBS1.
– Read operation is controlled using NCS, NRD, NBS0, NBS1.
– The number of TDF wait states is optimized using the setup period of the next read/write access.
– The number of TDF wait states is inserted before the next access begins.
Value
0
1
SAM3U Series
SAM3U Series
BIT_16
Name
BIT_8
Description
16-bit bus
8-bit bus
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11

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