ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 856

• Manufacturer Part Number: ATSAM3U-EK
• Description: KIT EVAL FOR AT91SAM3U CORTEX
• Manufacturer: Atmel
• Type: MCUr

Specifications of ATSAM3U-EK

• Contents: Board
• Processor To Be Evaluated: SAM3U
• Data Bus Width: 32 bit
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3 V
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex - M3
• Silicon Core Number: SAM3U4E
• Silicon Family Name: SAM3U
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT91SAM3U
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

37.13.16 HSMCI DMA Configuration Register
Name:
Address:
Access:
This register can only be written if the WPEN bit is cleared in
• OFFSET: DMA Write Buffer Offset
This field indicates the number of discarded bytes when the DMA writes the first word of the transfer.
• CHKSIZE: DMA Channel Read and Write Chunk Size
The CHKSIZE field indicates the number of data available when the DMA chunk transfer request is asserted.
• DMAEN: DMA Hardware Handshaking Enable
0 = DMA interface is disabled.
1 = DMA Interface is enabled.
Note:
• ROPT: Read Optimization with padding
0: BLKLEN bytes are moved from the Memory Card to the system memory, two DMA descriptors are used when the trans-
fer size is not a multiple of 4.
1: Ceiling(BLKLEN/4) * 4 bytes are moved from the Memory Card to the system memory, only one DMA descriptor is used.
856
31
23
15
–
–
7
–
To avoid unpredictable behavior, DMA hardware handshaking must be disabled when CPU transfers are performed.
SAM3U Series
Value
0
1
30
22
14
HSMCI_DMA
0x40000050
Read-write
–
–
6
–
29
21
13
–
–
–
5
–
Name
CHKSIZE
1
4
ROPT
28
20
12
–
–
4
“HSMCI Write Protect Mode Register” on page
27
19
11
–
–
–
3
–
1 data available
4 data available
Description
26
18
10
–
–
–
2
–
25
17
–
–
9
–
1
6430D–ATARM–25-Mar-11
OFFSET
858.
DMAEN
24
16
–
–
8
0