ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 225

Manufacturer Part Number

KIT EVAL FOR AT91SAM3U CORTEX

Manufacturer

Processor To Be Evaluated

Data Bus Width

Interface Type

Operating Supply Voltage

Silicon Manufacturer

Core Architecture

Core Sub-architecture

Silicon Core Number

Silicon Family Name

Kit Contents

Board CD Docs

Rohs Compliant

For Use With/related Products

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

Manufacturer

Part Number:

Manufacturer:

6430D–ATARM–25-Mar-11

MPU configuration for a microcontroller

Usually, a microcontroller system has only a single processor and no caches. In such a system,

program the MPU as follows:

Table 13-40. Memory region attributes for a microcontroller

In most microcontroller implementations, the share ability and cache policy attributes do not

affect the system behavior. However, using these settings for the MPU regions can make the

application code more portable. The values given are for typical situations. In special systems,

such as multiprocessor designs or designs with a separate DMA engine, the share ability attri-

bute might be important. In these cases refer to the recommendations of the memory device

manufacturer.

Memory region

Flash memory

Internal SRAM

External SRAM

Memory type and attributes

Normal memory, Non-shareable, write-through

Normal memory, Shareable, write-through

Normal memory, Shareable, write-back, write-allocate

Device memory, Shareable

SAM3U Series