ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 373
![KIT EVAL FOR AT91SAM3U CORTEX](/photos/9/20/92037/atsam3u-ek_sml.jpg)
ATSAM3U-EK
Manufacturer Part Number
ATSAM3U-EK
Description
KIT EVAL FOR AT91SAM3U CORTEX
Manufacturer
Atmel
Type
MCUr
Datasheets
1.ATSAM3U-EK.pdf
(2 pages)
2.ATSAM3U-EK.pdf
(61 pages)
3.ATSAM3U-EK.pdf
(1171 pages)
4.ATSAM3U-EK.pdf
(53 pages)
Specifications of ATSAM3U-EK
Contents
Board
Processor To Be Evaluated
SAM3U
Data Bus Width
32 bit
Interface Type
RS-232, USB
Operating Supply Voltage
3 V
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
SAM3U4E
Silicon Family Name
SAM3U
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT91SAM3U
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATSAM3U-EK
Manufacturer:
Atmel
Quantity:
10
- ATSAM3U-EK PDF datasheet
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Figure 25-19. TDF Optimization: No TDF wait states are inserted if the TDF period is over when the next access begins
25.13.3
6430D–ATARM–25-Mar-11
6430D–ATARM–25-Mar-11
D[15:0]
A [23:2]
NCS0
NWE
MCK
NRD
TDF Optimization Disabled (TDF_MODE = 0)
read access on NCS0 (NRD controlled)
When optimization is disabled, tdf wait states are inserted at the end of the read transfer, so that
the data float period ends when the second access begins. If the hold period of the read1 con-
trolling signal overlaps the data float period, no additional tdf wait states will be inserted.
Figure
with no TDF optimization.
• read access followed by a read access on another chip select,
• read access followed by a write access on another chip select,
• read access followed by a write access on the same chip select,
25-20,
Figure 25-21
NRD_HOLD= 4
TDF_CYCLES = 6
and
Figure 25-22
Read to Write
Wait State
NWE_SETUP= 3
illustrate the cases:
write access on NCS0 (NWE controlled)
SAM3U Series
SAM3U Series
373
373
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