ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 249

• Manufacturer Part Number: ATSAM3U-EK
• Description: KIT EVAL FOR AT91SAM3U CORTEX
• Manufacturer: Atmel
• Type: MCUr

Specifications of ATSAM3U-EK

• Contents: Board
• Processor To Be Evaluated: SAM3U
• Data Bus Width: 32 bit
• Interface Type: RS-232, USB
• Operating Supply Voltage: 3 V
• Silicon Manufacturer: Atmel
• Core Architecture: ARM
• Core Sub-architecture: Cortex - M3
• Silicon Core Number: SAM3U4E
• Silicon Family Name: SAM3U
• Kit Contents: Board CD Docs
• Rohs Compliant: Yes
• For Use With/related Products: AT91SAM3U
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

16.3.3
16.3.4
16.3.4.1
Figure 16-3. General Reset State
6430D–ATARM–25-Mar-11
backup_nreset
periph_nreset
proc_nreset
(nrst_out)
RSTTYP
SLCK
NRST
MCK
Brownout Manager
Reset States
General Reset
Please note that the NRST output is in high impedance state when the chip is in OFF mode.
The Brownout manager is embedded within the Supply Controller, please refer to the Supply
Controller section for a detailed description.
The Reset State Manager handles the different reset sources and generates the internal reset
signals. It reports the reset status in the field RSTTYP of the Status Register (RSTC_SR). The
update of the field RSTTYP is performed when the processor reset is released.
A general reset occurs when a Power-on-reset is detected, an Asynchronous Master Reset
(NRSTB pin) is requested, a Brownout or a Voltage regulation loss is detected by the Supply
controller. The vddcore_nreset signal is asserted by the Supply Controller when a general reset
occurs.
All the reset signals are released and the field RSTTYP in RSTC_SR reports a General Reset.
As the RSTC_MR is reset, the NRST line rises 2 cycles after the vddcore_nreset, as ERSTL
defaults at value 0x0.
Figure 16-3
shows how the General Reset affects the reset signals.
XXX
EXTERNAL RESET LENGTH
= 2 cycles
Processor Startup
= 2 cycles
0x0 = General Reset
SAM3U Series
Freq.
Any
XXX
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