ATSAM3U-EK Atmel, ATSAM3U-EK Datasheet - Page 67

KIT EVAL FOR AT91SAM3U CORTEX

ATSAM3U-EK

Manufacturer Part Number
ATSAM3U-EK
Description
KIT EVAL FOR AT91SAM3U CORTEX
Manufacturer
Atmel
Type
MCUr
Datasheets

Specifications of ATSAM3U-EK

Contents
Board
Processor To Be Evaluated
SAM3U
Data Bus Width
32 bit
Interface Type
RS-232, USB
Operating Supply Voltage
3 V
Silicon Manufacturer
Atmel
Core Architecture
ARM
Core Sub-architecture
Cortex - M3
Silicon Core Number
SAM3U4E
Silicon Family Name
SAM3U
Kit Contents
Board CD Docs
Rohs Compliant
Yes
For Use With/related Products
AT91SAM3U
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATSAM3U-EK
Manufacturer:
Atmel
Quantity:
10
13.3.3.15
• Active stack pointer
Defines the current stack:
0 = MSP is the current stack pointer
1 = PSP is the current stack pointer.
In Handler mode this bit reads as zero and ignores writes.
• Thread mode privilege level
Defines the Thread mode privilege level:
0 = privileged
1 = unprivileged.
Handler mode always uses the MSP, so the processor ignores explicit writes to the active stack pointer bit of the CON-
TROL register when in Handler mode. The exception entry and return mechanisms update the CONTROL register.
In an OS environment, ARM recommends that threads running in Thread mode use the process stack and the kernel and
exception handlers use the main stack.
By default, Thread mode uses the MSP. To switch the stack pointer used in Thread mode to the PSP, use the MSR instruc-
tion to set the Active stack pointer bit to 1, see
When changing the stack pointer, software must use an ISB instruction immediately after the MSR instruction. This
ensures that instructions after the ISB execute using the new stack pointer. See
6430D–ATARM–25-Mar-11
31
23
15
7
CONTROL register
30
22
14
6
The CONTROL register controls the stack used and the privilege level for software execution
when the processor is in Thread mode. See the register summary in
its attributes. The bit assignments are:
29
21
13
5
Reserved
“MSR” on page
28
20
12
4
Reserved
Reserved
Reserved
160.
27
19
11
3
“ISB” on page 158
26
18
10
2
Active Stack
SAM3U Series
Table 13-2 on page 59
Pointer
25
17
9
1
Thread Mode
Privilege
Level
24
16
8
0
for
67

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