MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 1103
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
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18.3.8.1.8
The latency timer register, shown in
it is not used for PCI Express device functionality.
Table 18-42
18.3.8.1.9
The PCI Express header type register, shown in
compatible header.
Table 18-42
Freescale Semiconductor
Offset 0x0D
Reset
Offset 0x0D
Reset
Bits
Bits
7–0
6–0
W
W
7
R
R Multifunction
Latency Timer Note that for PCI Express operation this register is ignored.
Multifunction Identifies whether a device supports multiple functions
describes the PCI Express latency timer register (PLTR).
describes the PCI Express header type register.
Header
Layout
7
7
Name
Name
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
PCI Express Latency Timer Register—0x0D
PCI Express Header Type Register—0x0E
Table 18-42. PCI Express Bus Latency Timer Register Field Descriptions
Table 18-43. PCI Express Bus Latency Timer Register Field Descriptions
0 Single function device
1 Multiple function device
0x00 Endpoint. See
0x01 Root Complex. See
All other encodings reserved.
6
Figure 18-44. PCI Express Bus Latency Timer Register
Figure 18-45. PCI Express Bus Latency Timer Register
Figure
Figure 18-46
18-44, is provided for legacy compatibility purposes (PCI 2.3);
Figure 18-58
Figure
0x00 (EP mode)
0x01 (RC mode)
Latency Timer
for type 0 layout.
All zeros
18-43, is used to identify the layout of the PCI
Header Layout
for type 1 layout.
Description
Description
PCI Express Interface Controller
Access: Read-only
Access: Read-only
0
0
18-49
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