MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 829

Manufacturer Part Number

BOARD DEVELOPMENT SYSTEM 8544

Manufacturer

Freescale Semiconductor

PowerQUICC III™r

Processor To Be Evaluated

Data Bus Width

Interface Type

Ethernet, I2C

Operating Supply Voltage

- 0.3 V to + 1.1 V

Leaded Process Compatible

Peak Reflow Compatible (260 C)

Rohs Compliant

For Use With/related Products

For Use With

PPC8544EVTANG - EVAL MPC8544 783FCPBGA

Lead Free Status / RoHS Status

Lead free / RoHS Compliant

15.5.3.6.34 Transmit Late Collision Packet Counter (TLCL)

Figure 15-85

15.5.3.6.35 Transmit Excessive Collision Packet Counter (TXCL)

Figure 15-86

Freescale Semiconductor

eTSEC1:0x2_4704; eTSEC3:0x2_5704

eTSEC1:0x2_4708; eTSEC3:0x2_5708

describes the fields of the TLCL register.

describes the fields of the TXCL register.

describes the definition for the TLCL register.

describes the definition for the TXCL register.

Figure 15-86. Transmit Excessive Collision Packet Counter Register Definition

MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1

Transmit late collision packet counter. Increments for each frame transmitted which experienced a late

collision during a transmission attempt. Late collisions are defined using the collision window field of the

half-duplex [26:31] register.

Figure 15-85. Transmit Late Collision Packet Counter Register Definition

collisions during transmission and was aborted.

Transmit excessive collision packet counter. Increments for each frame that experienced 16

Table 15-89. TXCL Field Descriptions

Table 15-88. TLCL Field Descriptions

Enhanced Three-Speed Ethernet Controllers

Access: Read/Write