MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 492
![BOARD DEVELOPMENT SYSTEM 8544](/photos/37/58/375876/mpc8544e_sml.jpg)
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
- Current page: 492 of 1340
- Download datasheet (12Mb)
Security Engine (SEC) 2.1
12-12
0x3_11C0–0x3_11DF Gather link tables
0x3_12C0–0x3_12DF Gather link tables
0x3_13C0–0x3_13DF Gather link tables
0x3_1180–0x3_11BF DB1—Crypto-channel 1 descriptor buffers
0x3_11E0–0x3_11FF Scatter link tables
0x3_1280–0x3_12BF DB2—Crypto-channel 2 descriptor buffers
0x3_12E0–0x3_12FF Scatter link tables
0x3_1380–0x3_13BF DB3—Crypto-channel 3 descriptor buffers
0x3_13E0–0x3_13FF Scatter link tables
Address Offset
(AD 17–0)
0x3_1148
0x3_1208
0x3_1210
0x3_1240
0x3_1248
0x3_1308
0x3_1310
0x3_1340
0x3_1348
0x3_1408
0x3_1410
0x3_1440
0x3_1448
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
FF1—Crypto-channel 1 fetch FIFO
address register
[0–7]
CCCR2—Crypto-channel 2 configuration
register
CCPSR2—Crypto-channel 2 pointer
status register
CDPR2—Crypto-channel 2 current
descriptor pointer register
FF2—Crypto-channel 2 fetch FIFO
address register
[0–7]
CCCR3—Crypto-channel3 configuration
register
CCPSR3—Crypto-channel3 pointer status
register
CDPR3—Crypto-channel 3 current
descriptor pointer register
FF3—Crypto-channel 3 fetch FIFO
address register
[0–7]
CCCR4—Crypto-channel 4 configuration
register
CCPSR4—Crypto-channel 4 pointer
status register
CDPR4—Crypto-channel 4 current
descriptor pointer register
FF4—Crypto-channel 4 fetch FIFO
address register
Table 12-3. SEC Address Map (continued)
Register
Channel 2
Channel 3
Channel 4
Access
R/W
R/W
R/W
W
W
W
W
W
W
W
W
W
W
R
R
R
R
R
R
R
R
R
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0007
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0007
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0007
0x0000_0000_0000_0000
0x0000_0000_0000_0000
0x0000_0000_0000_0000
Reset
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