MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 808
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
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- Download datasheet (12Mb)
Enhanced Three-Speed Ethernet Controllers
Table 15-47
15.5.3.5.10 MII Management Status Register (MIIMSTAT)
The MIIMSTAT register is read only by the user.
register.
Table 15-48
15.5.3.5.11 MII Management Indicator Register (MIIMIND)
The MIIMIND register is read-only by the user.
register.
15-76
16–31
16–31
0–15
0–15
Bits
Bits
O
Offset eTSEC1:0x2_4530
Reset
Offset eTSEC1:0x2_4534
Reset
W
R
W
R
PHY Control If written, an MII Mgmt write cycle is performed using this 16-bit data, the pre-configured PHY address
PHY Status Following an MII Mgmt read cycle, the 16-bit data can be read from this location. Its default value is
0
Name
0
Name
—
describes the fields of the MIIMCON register.
describes the fields of the MIIMSTAT register.
—
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Reserved
0x0000.
Reserved
(at MIIMADD[PHY Address]) and the register address (at MIIMADD[Register Address]). Its default
value is 0x0000.
Figure 15-46. MII Mgmt Indicator Register Definition
Figure 15-45. MIIMSTAT Register Definition
—
Table 15-48. MIIMSTAT Field Descriptions
Table 15-47. MIIMCON Field Descriptions
—
Figure 15-46
Figure 15-45
All zeros
All zeros
15 16
Description
Description
describes the definition for the MIIMIND
describes the definition for the MIIMSTAT
28
PHY Status
Not Valid
29
Freescale Semiconductor
Access: Read only
Access: Read only
Scan
30
Busy
31
31
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