MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 657

• Manufacturer Part Number: MPC8544DS
• Description: BOARD DEVELOPMENT SYSTEM 8544
• Manufacturer: Freescale Semiconductor
• Series: PowerQUICC III™r
• Type: MPUr

Specifications of MPC8544DS

• Contents: Board
• Processor To Be Evaluated: MPC8544E
• Data Bus Width: 32 bit
• Interface Type: Ethernet, I2C
• Operating Supply Voltage: - 0.3 V to + 1.1 V
• Leaded Process Compatible: Yes
• Peak Reflow Compatible (260 C): Yes
• Rohs Compliant: Yes
• For Use With/related Products: MPC8544
• For Use With: PPC8544EVTANG - EVAL MPC8544 783FCPBGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

Figure 14-24
user can configure ORn[ACS] to specify LCS to meet this requirement.
14.4.2.1
If BRn[MSEL] selects the GPCM, the attributes for the memory cycle are taken from ORn. These
attributes include the CSNT, ACS, XACS, SCY, TRLX, EHTR, and SETA fields.
Freescale Semiconductor
shows LCS as defined by the setup time required between the address lines and LCS. The
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
Timing Configuration
Figure 14-24. GPCM Basic Read Timing (XACS = 0, ACS = 1x, TRLX = 0)
LBC in GPCM
A[19:5]
LCLK
LALE
LCS n
LOE
LAD
Mode
TA
Figure 14-23. Local Bus to GPCM Device Interface
LAD[12:26]
LA[30:31]
LA[27:29]
Address
LAD[0:7]
LWE0
ACS = 10
LCS n
LALE
LOE
ACS = 11
Latched Address
Latch
Read Data
A[1:0]
A[4:2]
CE
OE
W
A[19:5]
Data[7:0]
Memory/Peripheral
Local Bus Controller
14-37