MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 144
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
- Current page: 144 of 1340
- Download datasheet (12Mb)
Signal Descriptions
3-4
Interface
Interface
Memory
Interface
DMA
Local
Bus
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
LGPL2/LOE/LSDRAS/cfg_core_pll[2]
LWE[1:3]/LBS[1:3]/cfg_host_agt[0:2]
LGPL0/LSDA10/cfg_dram_type[0]
LGPL1/LSDWE/cfg_dram_type[1]
LGPL3/LSDCAS/cfg_boot_seq[0]
LAD[0:31]/cfg_gpinput[0:31]
Figure 3-3. MPC8544E Signal Groupings (3/3) (Continued)
LA[28:31]/cfg_sys_pll[0:3]
LWE0/LBS0/cfg_sec_freq
LSYNC_IN, LSYNC_OUT
LGPL4/LGTA/LUPWAIT
LGPL5/cfg_boot_seq[1]
DMA_DDONE3/IRQ11
DMA_DDONE2/LCS7
LBCTL/cfg_core_pll[0]
LCS7/DMA_DDONE2
DMA_DACK3/IRQ10
DMA_DREQ2/LCS5
MCK[0:5], MCK[0:5]
DMA_DACK2/LCS6
LA[27]/cfg_cpu_boot
LALE/cfg_core_pll[1]
DMA_DREQ3/IRQ9
LCS5/DMA_DREQ2
LCS6/DMA_DACK2
DMA_DDONE[0:1]
DMA_DREQ[0:1]
DMA_DACK[0:1]
MSRCID[0:4]
MDQS[0:8]
MDQS[0:8]
MECC[0:7]
MODT[0:3]
MDQ[0:63]
MCKE[0:3]
MDIC[0:1]
MDM[0:8]
MCS[0:3]
LCLK[0:2]
MBA[2:0]
MA[15:0]
LDP[0:3]
LCS[0:4]
MDVAL
MRAS
MCAS
MWE
LCKE
32
4
1
4
5
1
1
3
1
1
1
1
1
1
1
1
1
3
2
64
8
9
9
9
3
16
1
1
1
4
4
12
4
2
1
5
2
2
2
1
1
1
1
1
1
1
1
32
1
1
1
1
3
1
1
1
4
3
3
1
1
1
1
1
1
1
1
1
2
3
1
1
1
2
cfg_pci_impd/PCI_GNT1
cfg_pci_arb/PCI_GNT2
cfg_pci_speed/PCI_GNT3
cfg_gpinput[0:31]/LAD[0:31]
cfg_sys_pll[0:3]/LA[28:31]
cfg_sec_freq/LWE0/LBS0
cfg_host_agt[0:2]/LWE[1:3]/LBS[1:3]
cfg_core_pll[0]/LBCTL
cfg_core_pll[1]/LALE
cfg_core_pll[2]/LGPL2/LOE/LSDRAS
cfg_boot_seq[0]/LGPL3/LSDCAS
cfg_boot_seq[1]/LGPL5
cfg_mem_debug/MSRCID[0]
cfg_ddr_debug/MSRCID[1]
cfg_pci_clk/PCI_GNT4
cfg_rom_loc[0:2]
/TSEC1_TXD[6:4]/FIFO1_TXD[6:4]
cfg_etsec1_reduce/TSEC1_TX_ER
cfg_etsec1_serial
/TSEC1_TXD2/FIFO1_TXD2
cfg_etsec1_prtcl[1:0]
/TSEC1_TXD[1:0]/FIFO1_TXD[1:0]
cfg_io_ports[0:2]
/TSEC3_TXD[6:4]/FIFO3_TXD[6:4]
cfg_etsec3_reduce/TSEC3_TX_ER
cfg_cpu_boot/LA[27]
cfg_dram_type[0]/LGPL0/LSDA10
cfg_dram_type[1]/LGPL1/LSDWE
cfg_srds_sgmii_refclk
/TSEC3_TXD3/FIFO3_TXD3
/TSEC3_TXD2/FIFO3_TXD2
cfg_etsec3_prtcl[1:0]
/TSEC3_TXD[1:0]/FIFO3_TXD[1:0]
cfg_etsec3_serial
Freescale Semiconductor
Configuration
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