MPC8544DS Freescale Semiconductor, MPC8544DS Datasheet - Page 74
![BOARD DEVELOPMENT SYSTEM 8544](/photos/37/58/375876/mpc8544e_sml.jpg)
MPC8544DS
Manufacturer Part Number
MPC8544DS
Description
BOARD DEVELOPMENT SYSTEM 8544
Manufacturer
Freescale Semiconductor
Series
PowerQUICC III™r
Type
MPUr
Datasheets
1.MPC8544VTALF.pdf
(117 pages)
2.MPC8544VTALF.pdf
(2 pages)
3.MPC8544VTALF.pdf
(1340 pages)
4.MPC8544DS.pdf
(2 pages)
Specifications of MPC8544DS
Contents
Board
Processor To Be Evaluated
MPC8544E
Data Bus Width
32 bit
Interface Type
Ethernet, I2C
Operating Supply Voltage
- 0.3 V to + 1.1 V
Leaded Process Compatible
Yes
Peak Reflow Compatible (260 C)
Yes
Rohs Compliant
Yes
For Use With/related Products
MPC8544
For Use With
PPC8544EVTANG - EVAL MPC8544 783FCPBGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
- MPC8544VTALF PDF datasheet
- MPC8544VTALF PDF datasheet #2
- MPC8544VTALF PDF datasheet #3
- MPC8544DS PDF datasheet #4
- Current page: 74 of 1340
- Download datasheet (12Mb)
Table
Number
12-26
12-27
12-28
12-29
12-30
12-31
12-32
12-33
12-34
12-35
12-36
12-37
12-38
12-39
12-40
12-41
12-42
12-43
12-44
12-45
12-46
12-47
12-48
12-49
12-50
12-51
12-52
12-53
12-54
12-55
12-56
12-57
12-58
12-59
12-60
12-61
12-62
13-1
13-2
13-3
13-4
lxxiv
MDEU Mode Register in Old Configuration (NEW = 0)................................................... 12-51
MDEU Mode Register in New Configuration (NEW = 1) ................................................. 12-52
Mode Register —HMAC or SSL-MAC Generated by Single Descriptor.......................... 12-53
Mode Register —HMAC Generated Across a Sequence of Descriptors............................ 12-54
MDEU Reset Control Register Field Descriptions ............................................................. 12-55
MDEU Status Register Field Descriptions ......................................................................... 12-56
MDEU Interrupt Status Register Field Descriptions .......................................................... 12-57
MDEU Interrupt Control Register Field Descriptions ........................................................ 12-58
RNG Reset Control Register Field Descriptions ................................................................ 12-64
RNG Status Register Field Descriptions............................................................................. 12-64
RNG Interrupt Status Register Field Descriptions.............................................................. 12-65
RNG Interrupt Control Register Field Descriptions ........................................................... 12-66
AESU Mode Register.......................................................................................................... 12-68
AES Cipher Modes ............................................................................................................. 12-68
AESU Reset Control Register Field Descriptions .............................................................. 12-70
AESU Status Register Field Descriptions........................................................................... 12-71
AESU Interrupt Status Register Field Descriptions............................................................ 12-72
AESU Interrupt Control Register Field Descriptions ......................................................... 12-73
KEU Mode Register Field Descriptions ............................................................................. 12-80
KEU Reset Control Register Field Descriptions................................................................. 12-82
KEU Status Register Field Descriptions ............................................................................. 12-83
KEU Interrupt Status Register Field Descriptions .............................................................. 12-84
KEU Interrupt Control Register Field Descriptions ........................................................... 12-86
KEU IV_1 Register Field Descriptions .............................................................................. 12-88
Crypto-Channel Configuration Register (CCCR) Field Descriptions ................................ 12-93
Header Dword Writeback Field Descriptions ..................................................................... 12-94
Crypto-Channel Pointer Status Register Field Descriptions ............................................... 12-95
G_STATE and S_STATE Field Values................................................................................ 12-97
CHN_STATE Field Values.................................................................................................. 12-98
Crypto-Channel Pointer Status Register Error Field Descriptions ..................................... 12-98
Channel Pointer Status Register PTR_DW Field Values .................................................... 12-99
Channel Current Descriptor Pointer Register Field Descriptions ..................................... 12-100
Channel Assignment Value ............................................................................................... 12-109
Field Names in Interrupt Mask, Interrupt Status, and Interrupt Clear Registers .............. 12-110
Channel Current Descriptor Pointer Register Signals....................................................... 12-113
Master Control Register (MCR) Field Descriptions ......................................................... 12-114
DUART Signal Overview ..................................................................................................... 13-3
DUART Signals—Detailed Signal Descriptions .................................................................. 13-3
DUART Register Summary .................................................................................................. 13-5
URBR Field Descriptions ..................................................................................................... 13-6
Fetch FIFO Field Descriptions......................................................................................... 12-101
MPC8544E PowerQUICC III Integrated Host Processor Family Reference Manual, Rev. 1
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