AT90CAN32 Automotive Atmel Corporation, AT90CAN32 Automotive Datasheet - Page 157

• Manufacturer Part Number: AT90CAN32 Automotive
• Manufacturer: Atmel Corporation

Specifications of AT90CAN32 Automotive

• Flash (kbytes): 32 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Can: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

7682C–AUTO–04/08
two types of Pulse Width Modulation (PWM) modes. See
on page
Table 14-1.
Note:
• Bit 5:4 – COM2A1:0: Compare Match Output Mode A
These bits control the Output Compare pin (OC2A) behavior. If one or both of the COM2A1:0
bits are set, the OC2A output overrides the normal port functionality of the I/O pin it is connected
to. However, note that the Data Direction Register (DDR) bit corresponding to OC2A pin must be
set in order to enable the output driver.
When OC2A is connected to the pin, the function of the COM2A1:0 bits depends on the
WGM21:0 bit setting.
are set to a normal or CTC mode (non-PWM).
Table 14-2.
Table 14-3
mode.
Table 14-3.
Note:
Mode
COM2A1
COM2A1
0
1
2
3
0
0
1
1
0
0
1
1
1. The CTC2 and PWM2 bit definition names are now obsolete. Use the WGM21:0 definitions.
1. A special case occurs when OCR2A equals TOP and COM2A1 is set. In this case, the com-
150.
WGM21
(CTC2)
However, the functionality and location of these bits are compatible with previous versions of
the timer.
pare match is ignored, but the set or clear is done at TOP. See
for more details.
shows the COM2A1:0 bit functionality when the WGM21:0 bits are set to fast PWM
0
0
1
1
Waveform Generation Mode Bit Description
Compare Output Mode, non-PWM Mode
Compare Output Mode, Fast PWM Mode
COM2A0
COM2A0
0
1
0
1
0
1
0
1
Table 14-2
WGM20
(PWM2)
0
1
0
1
Description
Normal port operation, OC2A disconnected.
Reserved
Clear OC2A on compare match.
Set OC2A at TOP.
Set OC2A on compare match.
Clear OC2A at TOP.
Description
Normal port operation, OC2A disconnected.
Toggle OC2A on compare match.
Clear OC2A on compare match.
Set OC2A on compare match.
Timer/Counter
Mode of Operation
Normal
PWM, Phase Correct
CTC
Fast PWM
shows the COM2A1:0 bit functionality when the WGM21:0 bits
(1)
Table 14-1
(1)
TOP
0xFF
0xFF
OCR2A
0xFF
AT90CAN32/64/128
“Fast PWM Mode” on page 152
Update of
OCR2A at
Immediate
TOP
Immediate
TOP
and
“Modes of Operation”
TOV2 Flag
Set on
MAX
BOTTOM
MAX
MAX
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