AT90CAN32 Automotive Atmel Corporation, AT90CAN32 Automotive Datasheet - Page 96

• Manufacturer Part Number: AT90CAN32 Automotive
• Manufacturer: Atmel Corporation

Specifications of AT90CAN32 Automotive

• Flash (kbytes): 32 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Can: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

11. Timer/Counter3/1/0 Prescalers
11.1
11.1.1
11.1.2
11.1.3
96
Overview
AT90CAN32/64/128
Internal Clock Source
Prescaler Reset
External Clock Source
Timer/Counter3, Timer/Counter1 and Timer/Counter0 share the same prescaler module, but the
Timer/Counters can have different prescaler settings. The description below applies to both
Timer/Counter3, Timer/Counter1 and Timer/Counter0.
Most bit references in this section are written in general form. A lower case “n” replaces the
Timer/Counter number.
The Timer/Counter can be clocked directly by the system clock (by setting the CSn2:0 = 1). This
provides the fastest operation, with a maximum Timer/Counter clock frequency equal to system
clock frequency (f
clock source. The prescaled clock has a frequency of either f
f
The prescaler is free running, i.e., operates independently of the Clock Select logic of the
Timer/Counter, and it is shared by Timer/Counter3, Timer/Counter1 and Timer/Counter0. Since
the prescaler is not affected by the Timer/Counter’s clock select, the state of the prescaler will
have implications for situations where a prescaled clock is used. One example of prescaling arti-
facts occurs when the timer is enabled and clocked by the prescaler (6 > CSn2:0 > 1). The
number of system clock cycles from when the timer is enabled to the first count occurs can be
from 1 to N+1 system clock cycles, where N equals the prescaler divisor (8, 64, 256, or 1024).
It is possible to use the prescaler reset for synchronizing the Timer/Counter to program execu-
tion. However, care must be taken if the other Timer/Counter that shares the same prescaler
also uses prescaling. A prescaler reset will affect the prescaler period for all Timer/Counters it is
connected to.
An external clock source applied to the T3/T1/T0 pin can be used as Timer/Counter clock
(clk
chronization logic. The synchronized (sampled) signal is then passed through the edge detector.
Figure 11-1
edge detector logic. The registers are clocked at the positive edge of the internal system clock
(
The edge detector generates one clk
tive (CSn2:0 = 6) edge it detects.
CLK_I/O
clk
I/O
T3
). The latch is transparent in the high period of the internal system clock.
/clk
/1024.
T1
/clk
shows a functional equivalent block diagram of the T3/T1/T0 synchronization and
T0
). The T3/T1/T0 pin is sampled once every system clock cycle by the pin syn-
CLK_I/O
). Alternatively, one of four taps from the prescaler can be used as a
T3
/clk
T1
/clk
T0
pulse for each positive (CSn2:0 = 7) or nega-
CLK_I/O
/8, f
CLK_I/O
/64, f
7682C–AUTO–04/08
CLK_I/O
/256, or