AT90CAN32 Automotive Atmel Corporation, AT90CAN32 Automotive Datasheet - Page 428

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AT90CAN32 Automotive

Manufacturer Part Number
AT90CAN32 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of AT90CAN32 Automotive

Flash (kbytes)
32 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
8
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
2
Can
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
8
Input Capture Channels
2
Pwm Channels
7
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
21 Analog to Digital Converter - ADC ...................................................... 272
22 JTAG Interface and On-chip Debug System ...................................... 292
23 Boundary-scan IEEE 1149.1 (JTAG) ................................................... 299
24 Boot Loader Support – Read-While-Write Self-Programming ......... 320
5
20.1
20.2
20.3
21.1
21.2
21.3
21.4
21.5
21.6
21.7
21.8
22.1
22.2
22.3
22.4
22.5
22.6
22.7
22.8
22.9
22.10 Bibliography ....................................................................................................298
23.1
23.2
23.3
23.4
23.5
23.6
23.7
23.8
24.1
24.2
AT90CAN32/64/128
Overview .........................................................................................................268
Analog Comparator Register Description .......................................................268
Analog Comparator Multiplexed Input .............................................................270
Features ..........................................................................................................272
Operation ........................................................................................................273
Starting a Conversion .....................................................................................274
Prescaling and Conversion Timing .................................................................275
Changing Channel or Reference Selection .....................................................278
ADC Noise Canceler .......................................................................................279
ADC Conversion Result ..................................................................................283
ADC Register Description ...............................................................................286
Features ..........................................................................................................292
Overview .........................................................................................................292
Test Access Port – TAP ..................................................................................292
TAP Controller ................................................................................................295
Using the Boundary-scan Chain .....................................................................296
Using the On-chip Debug System ...................................................................296
On-chip Debug Specific JTAG Instructions .....................................................297
On-chip Debug Related Register in I/O Memory ............................................298
Using the JTAG Programming Capabilities ....................................................298
Features ..........................................................................................................299
System Overview ............................................................................................299
Data Registers ................................................................................................299
Boundary-scan Specific JTAG Instructions .....................................................301
Boundary-scan Related Register in I/O Memory ............................................303
Boundary-scan Chain .....................................................................................303
AT90CAN32/64/128 Boundary-scan Order ....................................................313
Boundary-scan Description Language Files ...................................................319
Features ..........................................................................................................320
Application and Boot Loader Flash Sections ..................................................320
7682C–AUTO–04/08

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