AT90CAN32 Automotive Atmel Corporation, AT90CAN32 Automotive Datasheet - Page 258

• Manufacturer Part Number: AT90CAN32 Automotive
• Manufacturer: Atmel Corporation

Specifications of AT90CAN32 Automotive

• Flash (kbytes): 32 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Can: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

19.10.11 CAN Timer Control Register - CANTCON
19.10.12 CAN Timer Registers - CANTIML and CANTIMH
19.10.13 CAN TTC Timer Registers - CANTTCL and CANTTCH
258
AT90CAN32/64/128
• Bit 3:1 – PHS12:0: Phase Segment 1
This phase is used to compensate for phase edge errors. This segment may be lengthened by
the re-synchronization jump width.
• Bit 0 – SMP: Sample Point(s)
• Bit 7:0 – TPRSC7:0: CAN Timer Prescaler
Prescaler for the CAN timer upper counter range 0 to 255. It provides the clock to the CAN timer
if the CAN controller is enabled.
T
• Bits 15:0 - CANTIM15:0: CAN Timer Count
CAN timer counter range 0 to 65,535.
• Bits 15:0 - TIMTTC15:0: TTC Timer Count
CAN TTC timer counter range 0 to 65,535.
Initial Value
Read/Write
Initial Value
Read/Write
clk
Initial Value
Read/Write
Bit
Bit
CANTIM
Bit
Bit
Bit
– 0 - once, at the sample point.
– 1 - three times, the threefold sampling of the bus is the sample point and twice over
a distance of a 1/2 period of the Tscl. The result corresponds to the majority decision
of the three values.
CANTIM15 CANTIM14 CANTIM13 CANTIM12 CANTIM11 CANTIM10 CANTIM9 CANTIM8 CANTIMH
CANTIM7
=
TIMTTC15 TIMTTC14 TIMTTC13 TIMTTC12 TIMTTC11 TIMTTC10 TIMTTC9 TIMTTC8 CANTTCH
TIMTTC7
T
TPRSC7
15
R
15
7
0
R
7
0
R/W
clk
7
0
IO
CANTIM6
x 8 x (CANTCON [7:0] + 1)
TIMTTC6
TPRSC6
14
R
6
0
14
R/W
R
6
0
6
0
CANTIM5
TIMTTC5
TPRSC5
13
R/W
R
5
0
13
R
5
0
5
0
CANTIM4
Tphs1 = Tscl x (PHS1 [2:0] + 1)
TPRSC4
TIMTTC4
R/W
12
R
12
4
0
4
0
R
4
0
TPRSC3
CANTIM3
TIMTTC3
R/W
3
0
11
R
11
3
0
R
3
0
TPRSC2
CANTIM2 CANTIM1 CANTIM0 CANTIML
TIMTTC2 TIMTTC1 TIMTTC0 CANTTCL
R/W
2
0
10
10
R
2
0
R
2
0
TRPSC1
R/W
1
0
R
R
1
9
0
1
9
0
TPRSC0
R/W
0
0
R
0
8
0
R
0
8
0
CANTCON
7682C–AUTO–04/08