AT90CAN32 Automotive Atmel Corporation, AT90CAN32 Automotive Datasheet - Page 35

• Manufacturer Part Number: AT90CAN32 Automotive
• Manufacturer: Atmel Corporation

Specifications of AT90CAN32 Automotive

• Flash (kbytes): 32 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Can: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

4.5.9
7682C–AUTO–04/08
Using all 64KB Locations of External Memory
Since the External Memory is mapped after the Internal Memory as shown in
(64K-(“ISRAM size”+256)) bytes of External Memory is available by default (address space
0x0000 to “ISRAM end” is reserved for internal memory). However, it is possible to take advan-
tage of the entire External Memory by masking the higher address bits to zero. This can be done
by using the XMMn bits and control by software the most significant bits of the address. By set-
ting Port C to output 0x00, and releasing the most significant bits for normal Port Pin operation,
the Memory Interface will address 0x0000 - 0x1FFF. See the following code examples.
Note:
Care must be exercised using this option as most of the memory is masked away.
Assembly Code Example
C Code Example
#define OFFSET 0x2000
void XRAM_example(void)
{
unsigned char *p = (unsigned char *) (OFFSET + 1);
DDRC = 0xFF;
PORTC = 0x00;
XMCRB = (1<<XMM1) | (1<<XMM0);
*p = 0xaa;
XMCRB = 0x00;
*p = 0x55;
}
; OFFSET is defined to 0x2000 to ensure
; external memory access
; Configure Port C (address high byte) to
; output 0x00 when the pins are released
; for normal Port Pin operation
ldi
out
ldi
out
; release PC7:5
ldi
sts
; write 0xAA to address 0x0001 of external
; memory
ldi
sts
; re-enable PC7:5 for external memory
ldi
sts
; store 0x55 to address (OFFSET + 1) of
; external memory
ldi
sts
1. The example code assumes that the part specific header file is included.
r16, 0xFF
DDRC, r16
r16, 0x00
PORTC, r16
r16, (1<<XMM1)|(1<<XMM0)
XMCRB, r16
r16, 0xaa
0x0001+OFFSET, r16
r16, (0<<XMM1)|(0<<XMM0)
XMCRB, r16
r16, 0x55
0x0001+OFFSET, r16
(1)
(1)
AT90CAN32/64/128
Figure
4-4, only
35