AT90CAN32 Automotive Atmel Corporation, AT90CAN32 Automotive Datasheet - Page 379

• Manufacturer Part Number: AT90CAN32 Automotive
• Manufacturer: Atmel Corporation

Specifications of AT90CAN32 Automotive

• Flash (kbytes): 32 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Can: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Table 27-14. External Data Memory Characteristics, V
Notes:
7682C–AUTO–04/08
0
10
12
14
15
16
Symbol
1/t
t
t
t
t
t
RLDV
RLRH
WHDX
DVWH
WLWH
1. All DC Characteristics contained in this datasheet are based on simulation and characterization of other AVR microcontrol-
CLCL
lers manufactured in the same process technology. These values are preliminary values representing design targets, and
will be updated after characterization of actual silicon.
Parameter
Oscillator Frequency
Read Low to Data Valid
RD Pulse Width
Data Hold After WR High
Data Valid to WR High
WR Pulse Width
Figure 27-6. External Memory Timing (SRWn1 = 0, SRWn0 = 0)
System Clock (CLK
DA7:0 (XMBK = 0)
DA7:0
A15:8
CPU
ALE
WR
RD
)
Prev. addr.
Prev. data
Min.
735
485
750
735
CC
4 MHz Oscillator
= 2.7 - 5.5 Volts, SRWn1 = 1, SRWn0 = 1
T1
Max.
1
690
Address
Address
4
2
5
T2
6
3a
3b
XX
7
8
3.0 t
2.0 t
3.0 t
13
AT90CAN32/64/128
3.0 t
Min.
CLCL
CLCL
CLCL
10
0.0
Variable Oscillator
Address
CLCL
T3
15
– 15
– 15
– 15
12
Data
Data
16
9
11
3.0 t
(1)
Max.
CLCL
T4
8
14
– 60
Unit
MHz
ns
ns
ns
ns
ns
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