AT90CAN32 Automotive Atmel Corporation, AT90CAN32 Automotive Datasheet - Page 237

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AT90CAN32 Automotive

Manufacturer Part Number
AT90CAN32 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of AT90CAN32 Automotive

Flash (kbytes)
32 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
8
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
2
Can
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
8
Input Capture Channels
2
Pwm Channels
7
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
19.2.3.8
19.2.3.9
19.2.3.10
19.2.3.11
19.2.3.12
19.2.4
7682C–AUTO–04/08
Arbitration
Bit Lengthening
Bit Shortening
Synchronization Jump Width
Programming the Sample Point
Synchronization
The IPT begins at the sample point, is measured in TQ and is fixed at 2TQ for the Atmel CAN.
Since Phase Segment 2 also begins at the sample point and is the last segment in the bit time,
PS2 minimum shall not be less than the IPT.
As a result of resynchronization, Phase Segment 1 may be lengthened or Phase Segment 2
may be shortened to compensate for oscillator tolerances. If, for example, the transmitter oscilla-
tor is slower than the receiver oscillator, the next falling edge used for resynchronization may be
delayed. So Phase Segment 1 is lengthened in order to adjust the sample point and the end of
the bit time.
If, on the other hand, the transmitter oscillator is faster than the receiver one, the next falling
edge used for resynchronization may be too early. So Phase Segment 2 in bit N is shortened in
order to adjust the sample point for bit N+1 and the end of the bit time
The limit to the amount of lengthening or shortening of the Phase Segments is set by the Resyn-
chronization Jump Width.
This segment may not be longer than Phase Segment 2.
Programming of the sample point allows "tuning" of the characteristics to suit the bus.
Early sampling allows more Time Quanta in the Phase Segment 2 so the Synchronization Jump
Width can be programmed to its maximum. This maximum capacity to shorten or lengthen the
bit time decreases the sensitivity to node oscillator tolerances, so that lower cost oscillators such
as ceramic resonators may be used.
Late sampling allows more Time Quanta in the Propagation Time Segment which allows a
poorer bus topology and maximum bus length.
Hard synchronization occurs on the recessive-to-dominant transition of the start bit. The bit time
is restarted from that edge.
Re-synchronization occurs when a recessive-to-dominant edge doesn't occur within the Syn-
chronization Segment in a message.
The CAN protocol handles bus accesses according to the concept called “Carrier Sense Multiple
Access with Arbitration on Message Priority”.
During transmission, arbitration on the CAN bus can be lost to a competing device with a higher
priority CAN Identifier. This arbitration concept avoids collisions of messages whose transmis-
sion was started by more than one node simultaneously and makes sure the most important
message is sent first without time loss.
The bus access conflict is resolved during the arbitration field mostly over the identifier value. If a
data frame and a remote frame with the same identifier are initiated at the same time, the data
frame prevails over the remote frame (c.f. RTR bit).
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