AT90CAN32 Automotive Atmel Corporation, AT90CAN32 Automotive Datasheet - Page 227

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AT90CAN32 Automotive

Manufacturer Part Number
AT90CAN32 Automotive
Description
Manufacturer
Atmel Corporation

Specifications of AT90CAN32 Automotive

Flash (kbytes)
32 Kbytes
Pin Count
64
Max. Operating Frequency
16 MHz
Cpu
8-bit AVR
# Of Touch Channels
16
Hardware Qtouch Acquisition
No
Max I/o Pins
53
Ext Interrupts
8
Usb Speed
No
Usb Interface
No
Spi
1
Twi (i2c)
1
Uart
2
Can
1
Graphic Lcd
No
Video Decoder
No
Camera Interface
No
Adc Channels
8
Adc Resolution (bits)
10
Adc Speed (ksps)
15
Analog Comparators
1
Resistive Touch Screen
No
Temp. Sensor
No
Crypto Engine
No
Sram (kbytes)
2
Eeprom (bytes)
1024
Self Program Memory
YES
Dram Memory
No
Nand Interface
No
Picopower
No
Temp. Range (deg C)
-40 to 125
I/o Supply Class
2.7 to 5.5
Operating Voltage (vcc)
2.7 to 5.5
Fpu
No
Mpu / Mmu
no / no
Timers
4
Output Compare Channels
8
Input Capture Channels
2
Pwm Channels
7
32khz Rtc
Yes
Calibrated Rc Oscillator
Yes
18.8.4
7682C–AUTO–04/08
Slave Transmitter Mode
In the Slave Transmitter mode, a number of data bytes are transmitted to a master receiver (see
Figure
zero or are masked to zero.
Figure 18-17. Data Transfer in Slave Transmitter Mode
To initiate the Slave Transmitter mode, TWAR and TWCR must be initialized as follows:
The upper seven bits are the address to which the Two-wire Serial Interface will respond when
addressed by a master. If the LSB is set, the TWI will respond to the general call address (0x00),
otherwise it will ignore the general call address.
TWEN must be written to one to enable the TWI. The TWEA bit must be written to one to enable
the acknowledgment of the device’s own slave address or the general call address. TWSTA and
TWSTO must be written to zero.
When TWAR and TWCR have been initialized, the TWI waits until it is addressed by its own
slave address (or the general call address if enabled) followed by the data direction bit. If the
direction bit is “1” (read), the TWI will operate in ST mode, otherwise SR mode is entered. After
its own slave address and the write bit have been received, the TWINT flag is set and a valid
status code can be read from TWSR. The status code is used to determine the appropriate soft-
ware action. The appropriate action to be taken for each status code is detailed in
The Slave Transmitter mode may also be entered if arbitration is lost while the TWI is in the
Master mode (see state 0xB0).
If the TWEA bit is written to zero during a transfer, the TWI will transmit the last byte of the trans-
fer. State 0xC0 or state 0xC8 will be entered, depending on whether the master receiver
transmits a NACK or ACK after the final byte. The TWI is switched to the not addressed slave
mode, and will ignore the master if it continues the transfer. Thus the master receiver receives
all “1” as serial data. State 0xC8 is entered if the master demands additional data bytes (by
transmitting ACK), even though the slave has transmitted the last byte (TWEA zero and expect-
ing NACK from the master).
TWAR
value
TWCR
value
18-17). All the status codes mentioned in this section assume that the prescaler bits are
SDA
SCL
TWINT
TWA6
0
TRANSMITTER
Device 1
SLAVE
TWEA
TWA5
1
TWSTA
TWA4
Device 2
RECEIVER
Device’s Own Slave Address
MASTER
0
TWSTO
TWA3
0
Device 3
TWWC
TWA2
0
AT90CAN32/64/128
........
TWEN
TWA1
1
Device n
TWA0
0
TWGCE
R1
TWIE
X
Table
V
CC
R2
18-6.
227

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