AT90CAN32 Automotive Atmel Corporation, AT90CAN32 Automotive Datasheet - Page 245

• Manufacturer Part Number: AT90CAN32 Automotive
• Manufacturer: Atmel Corporation

Specifications of AT90CAN32 Automotive

• Flash (kbytes): 32 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Can: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

19.5.3
19.5.4
7682C–AUTO–04/08
MOb Page
CAN Data Buffers
Figure 19-10. Acceptance Filter Block Diagram
Note:
Every MOb is mapped into a page to save place. The page number is the MOb number. This
page number is set in CANPAGE register. The number 15 is reserved for factory tests.
CANHPMOB register gives the MOb having the highest priority in CANSIT registers. It is format-
ted to provide a direct entry for CANPAGE register. Because CANHPMOB codes CANSIT
registers, it will be only updated if the corresponding enable bits (ENRX, ENTX, ENERR) are
enabled (c.f.
To preserve register allocation, the CAN data buffer is seen such as a FIFO (with address
pointer accessible) into a MOb selection.This also allows to reduce the risks of un-controlled
accesses.
There is one FIFO per MOb. This FIFO is accessed into a MOb page thanks to the CAN mes-
sage register.
The data index (INDX) is the address pointer to the required data byte. The data byte can be
read or write. The data index is automatically incremented after every access if the AINC* bit is
reset. A roll-over is implemented, after data index=7 it is data index=0.
The first byte of a CAN frame is stored at the data index=0, the second one at the data index=1,
...
internal RxDcan
Examples:
Full filtering: to accept only ID = 0x317 in part A.
- ID MSK = 111 1111 1111
- ID TAG = 011 0001 0111
Partiel filtering: to accept ID from 0x310 up to 0x317 in part A.
- ID MSK = 111 1111 1000
- ID TAG = 011 0001 0xxx
No filtering: to accept all ID’s from 0x000 up to 0x7FF in part A.
- ID MSK = 000 0000 0000
- ID TAG = xxx xxxx xxxx
CANIDT Registers & CANCDMOB (MOb[i])
ID &RB
Figure
19-14).
13(32)
Rx Shift Register (internal)
ID &RB
RTRTAG
Enable
Write
13(32)
13(32)
IDE
RTR
b
b
b
b
b
b
=
IDE
IDMSK
13(32)
1
CANIDM Registers (MOb[i])
AT90CAN32/64/128
13(32)
RTRMSK
IDEMSK
Hit MOb[
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