AT90CAN32 Automotive Atmel Corporation, AT90CAN32 Automotive Datasheet - Page 371

• Manufacturer Part Number: AT90CAN32 Automotive
• Manufacturer: Atmel Corporation

Specifications of AT90CAN32 Automotive

• Flash (kbytes): 32 Kbytes
• Pin Count: 64
• Max. Operating Frequency: 16 MHz
• Cpu: 8-bit AVR
• # Of Touch Channels: 16
• Hardware Qtouch Acquisition: No
• Max I/o Pins: 53
• Ext Interrupts: 8
• Usb Speed: No
• Usb Interface: No
• Spi: 1
• Twi (i2c): 1
• Uart: 2
• Can: 1
• Graphic Lcd: No
• Video Decoder: No
• Camera Interface: No
• Adc Channels: 8
• Adc Resolution (bits): 10
• Adc Speed (ksps): 15
• Analog Comparators: 1
• Resistive Touch Screen: No
• Temp. Sensor: No
• Crypto Engine: No
• Sram (kbytes): 2
• Eeprom (bytes): 1024
• Self Program Memory: YES
• Dram Memory: No
• Nand Interface: No
• Picopower: No
• Temp. Range (deg C): -40 to 125
• I/o Supply Class: 2.7 to 5.5
• Operating Voltage (vcc): 2.7 to 5.5
• Fpu: No
• Mpu / Mmu: no / no
• Timers: 4
• Output Compare Channels: 8
• Input Capture Channels: 2
• Pwm Channels: 7
• 32khz Rtc: Yes
• Calibrated Rc Oscillator: Yes

Figure 27-3. Two-wire Serial Bus Timing
27.6
7682C–AUTO–04/08
2. Required only for f
3. C
4. f
5. This requirement applies to all AT90CAN32/64/128 Two-wire Serial Interface operation. Other devices connected to the
6. The actual low period generated by the AT90CAN32/64/128 Two-wire Serial Interface is (1/f
7. The actual low period generated by the AT90CAN32/64/128 Two-wire Serial Interface is (1/f
SPI Timing Characteristics
SCL
SDA
Two-wire Serial Bus need only obey the general f
greater than 6 MHz for the low time requirement to be strictly met at f
requirement will not be strictly met for f
bus may communicate at full speed (400 kHz) with other AT90CAN32/64/128 devices, as well as any other device with a
proper t
CK
b
= capacitance of one bus line in pF.
= CPU clock frequency
t
SU;STA
LOW
acceptance margin.
See
Table 27-4.
SCL
10
11
12
1
2
3
4
5
6
7
8
9
Figure 27-4
> 100 kHz.
t
HD;STA
t
t
SCK high/low
SCK to out high
of
LOW
SCK high/low
Rise/Fall time
Rise/Fall time
SS low to out
SPI Timing Parameters
Description
SCK period
SCK period
Out to SCK
SCK to out
and
Setup
Hold
SCL
Figure 27-5
> 308 kHz when f
t
HIGH
t
(1)
HD;DAT
SCL
requirement.
for details.
t
LOW
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
CK
= 8 MHz. Still, AT90CAN32/64/128 devices connected to the
t
SU;DAT
SCL
4 • t
2 • t
Min.
= 100 kHz.
ck
ck
AT90CAN32/64/128
See
50% duty cycle
0.5 • t
Table 16-4
t
Typ.
SU;STO
3.6
SCL
SCL
10
10
10
10
15
sck
t
- 2/f
- 2/f
r
CK
CK
), thus f
), thus the low time
t
Max.
BUF
CK
1.6
must be
ns
µs
371