cx28394 Conexant Systems, Inc., cx28394 Datasheet - Page 105

• Manufacturer Part Number: cx28394
• Description: Quad/x16/octal-t1/e1/j1 Framers
• Manufacturer: Conexant Systems, Inc.

CX28394/28395/28398
Quad/x16/Octal—T1/E1/J1 Framers
2.4.4 Overhead Pattern Generation
100054E
2.4.4.1 Framing Pattern
2.4. 4.2 Alarm
AIS Generation
Generation
Generation
The transmit overhead generation circuitry provides the ability to insert all of the
overhead associated with the Primary Rate Channel. The following types of
overhead pattern generation are supported: Framing patterns, Alarm patterns,
Cyclic Redundancy Check (CRC), and Far-End Block Error (FEBE).
The framing pattern generation circuitry inserts the 2-bit terminal framing (Ft)
pattern, the 6-bit signaling frame (Fs) pattern, the 6-bit FPS pattern, the 8-bit
FAS/NFAS pattern, and the 6-bit MFAS pattern into the transmit data stream.
stream by enabling the INS_FBIT in the Transmit Frame Format register [TFRM;
addr 072]. The Fs pattern in SF is inserted by enabling the INS_MF bit. The FPS
pattern in T1-ESF and the FAS/NFAS pattern in E1 mode are inserted by enabling
the INS_FBIT bit. The MFAS pattern is inserted by enabling the INS_MF bit.
The Transmit Alarm Generation circuitry generates Alarm Indication Signal
(AIS) and Remote Alarm Indication (RAI/Yellow Alarm).
AIS is an unframed all-ones pattern and is normally transmitted when the data
source is lost. AIS transmission can be enabled:
transmit data or clock is not present. In most applications, DTE data and clock are
isolated from the transmitter requiring manual AIS transmission under software
control. Manual insertion of AIS is controlled by the TAIS bit in Transmit Alarm
Signal Configuration register [TALM; addr 075]. Setting this bit overwrites the
currently transmitted data with the AIS pattern. If AISCLK [TLIU_CR; addr 068]
is also set, AIS is transmitted using an alternate transmit line rate clock supplied
on E1ACKI (for E1) or T1ACKI (for T1) pins.
of clock [TLOC; addr 048]. This mode is enabled by setting AISCLK and
providing an alternate transmit line rate clock on the E1ACKI or T1ACKI pin. If
no transitions are detected on the TCKI pin for eight cycles of E1ACKI or
T1ACKI, TLOC is set and AIS is transmitted. AIS is terminated and TLOC
cleared when TCKI returns.
can also be controlled by detection of Receiver Loss Of Signal [RLOS; addr 047].
This mode is typically used to transmit AIS (keep-alive) during line loopback if
the received signal is lost. Setting AUTO_AIS simultaneously with setting
LLOOP [LOOP; addr 014] enables this operation.
The Ft pattern in SF, SLC-96, and T1DM is inserted into the transmit data
1.
2.
3.
Typical applications require transmission of AIS toward the line when DTE
Automatic transmission of AIS can be controlled by detection of transmit loss
By setting AUTO_AIS in the TALM register, automatic transmission of AIS
manually,
automatically upon detection of transmit loss of clock, and
automatically upon loss of received signal.
Conexant
2.0 Circuit Description
2.4 Transmitter
2-47