cx28394 Conexant Systems, Inc., cx28394 Datasheet - Page 150

• Manufacturer Part Number: cx28394
• Description: Quad/x16/octal-t1/e1/j1 Framers
• Manufacturer: Conexant Systems, Inc.

3.0 Registers
3.7 Primary Control and Status Registers
DL3_TS works in conjunction with the DL3_BIT Register [addr 016] to determine which transmit time slots are
supplied from the TDLI pins and which receive and transmit time slots are accompanied by a gated RDLCKO
and TDLCKO output. Refer to
the entire receive data bit stream, and only selective time slots are marked by RDLCKO. DL3 is not accessible
on the CX28395 device, therefore, DL3_TS must be written to 00.
CX28394, CX28398
CX28395
DL3EN
ODD/EVEN
TS[4:0]
3-28
015—External Data Link Time Slot (DL3_TS)
DL3EN
7
7
0
Enable External Data Link—Active high enables data insertion from TDLI and clock gating
on TDLCKO and RDLCKO outputs according to the selected external data link mode. PIO
[addr 018] must select TDL_IO and/or RDL_IO to enable external data link signals.
Odd/Even Frame Select—The external data link is programmed to source and sink data bits
during all frames or odd or even frames only. ODD/EVEN also controls gating of RDLCKO
and TDLCKO external data link clocks. Frames are counted from 0 through 15 in E1 mode and
1 through 24 in T1 mode, where frames 1, 3, 5 etc., are always considered ODD frames.
ODD/EVEN is ignored if T1 Fbits are selected in DL3_TS.
External Data Link Time Slot Select—Picks one 8-bit time slot for input and output over the
external data link pins. Any time slot can be chosen from TS0 to TS31 in E1 mode, or TS1 to
TS24 in T1 mode. In T1 mode, TS0 selects Fbits instead of a channel time slot.
ODD
0 = external data link pins inactive
1 = TDLI/TDLCKO and RDLO/RDLCKO active
6
6
0
ODD
00000
00001
11110
11111
0
0
1
1
|
Figure 2-21, Transmit External Data Link
EVEN
T1 Fbits or E1 Time Slot 0
Time Slot 1
Time Slot 30
Time Slot 31
EVEN
0
1
0
1
5
5
0
|
None. Equivalent to disabling external data link.
Even frames only. Frame 0, 2, 4, 6, etc.
Odd frames only. Frame 1, 3, 5, 7, etc.
All frames
TS[4]
4
4
0
Conexant
Frame Select
TS[3]
3
3
0
Waveforms. Note that RDLO outputs
TS[2]
2
2
0
Quad/x16/Octal—T1/E1/J1 Framers
CX28394/28395/28398
TS[1]
1
1
0
TS[0]
100054E
0
0
0