cx28394 Conexant Systems, Inc., cx28394 Datasheet - Page 51

• Manufacturer Part Number: cx28394
• Description: Quad/x16/octal-t1/e1/j1 Framers
• Manufacturer: Conexant Systems, Inc.

CX28394/28395/28398
Quad/x16/Octal—T1/E1/J1 Framers
Table 1-6. Hardware Signal Definitions (3 of 9)
100054E
SERDI
SERCKO
SERDO
SERCS*
SERCS1*
SERCS2*
TCKI[4:1]
TCKI[8:1]
TCKI[16:1]
T1ACKI
E1ACKI
TPOSO[4:1]
TPOSO[8:1]
TNEGO[4:1]
TNEGO[8:1]
TDLI[4:1]
TDLI[8:1]
TDLCKO[4:1]
TDLCKO[8:1]
Pin Label
Serial Data Input
Serial Clock
Serial Data
Output
Serial Chip
Select
Serial Chip
Selects
TX Clock Input
T1 All Ones
Clock
E1 All Ones
Clock
TX Positive Rail
Output
TX Negative Rail
Output
TX Data Link
Input
TX Data Link
Clock
Signal Name
Device
4, 5, 8
4, 5, 8
4, 8
4, 8
4, 8
4
8
4
8
5
4
8
4
8
4
8
4
8
(1)
Transmitter (XMTR)
LIU Serial Interface
Conexant
I/O
O
O
O
O
O
O
O
I
I
I
I
I
Serial data input from an LIU is sampled on rising edge
of SERCKO and written into Serial Data Register; addr
023.
Serial bit clock provided for transmitting and receiving
serial LIU data on SERDI and SERDO. SERCKO
frequency is 1.024 MHz or 8.192 MHz selectable.
Address and data is output to an LIU serially on SERDO.
Data changes on falling edge of SERCKO.
Chip select line used to select an LIU’s serial port for
communication. SERCS is controlled in Serial
Configuration Register; addr 025.
Chip select lines used to select an LIU’s serial port for
communication. SERCS1* and SERCS2* are
independently controlled in Serial Configuration
Register; addr 025.
Primary TX line rate clocks for transmitter signals:
TPOSO, TNEGO, TNRZO, MSYNCO, TDLI, and TDLCKO.
If TSLIP is bypassed, TCKI also clocks TSB signals.
System optionally applies T1ACKI to use for T1 AIS
transmission in case the selected primary transmit clock
source fails. T1ACKI is either manually or automatically
switched to replace TCKI (see [AISCLK; addr 075]).
Systems without a T1 AIS clock should tie T1ACKI to
ground.
System optionally applies E1ACKI to use for E1 AIS
transmission in case the selected primary transmit clock
source fails. E1ACKI is either manually or automatically
switched to replace TCKI (see [AISCLK; addr 075]).
Systems without an E1 AIS clock should tie E1ACKI to
ground.
Line rate data output from ZCS encoder changes on
rising edge of TCKO. Active-high marks transmission of
a positive AMI pulse.
Line-rate data output from ZCS encoder changes on
rising edge of TCKO. Active high marks transmission of a
negative AMI pulse.
Selected time slot bits are sampled on TDLCKO falling
edge for insertion into the transmit output stream during
external data link applications.
Gapped version of TCKI for external data link
applications. TDLCKO high clock pulse coincides with
low TCKI pulse interval during selected time slot bits,
else TDLCKO low (see [DL3_TS; addr 015]).
Definition
1.0 Product Description
1.2 Pin Assignments
1-33