cx28394 Conexant Systems, Inc., cx28394 Datasheet - Page 133

• Manufacturer Part Number: cx28394
• Description: Quad/x16/octal-t1/e1/j1 Framers
• Manufacturer: Conexant Systems, Inc.

CX28394/28395/28398
Quad/x16/Octal—T1/E1/J1 Framers
3.3 Primary Control and Status Register
Unused bits are reserved and should be written to 0.
RESET
100054E
001—Primary Control Register (CR0)
RINCF
RESET
7
Framer Reset—When written to 1 by the microprocessor, RESET initiates an internal reset
process which initializes certain control registers to their default settings (see
internal reset process takes a maximum of 15 sec.
RESET remains active (1) during the reset process to allow the microprocessor to detect reset
completion. RESET also indicates a reset operation triggered by power-up, GRESET [FCR;
addr 080], or by an active low RST* pin. After RESET initialization, the following is true:
Receiver Framer CRC6 include F-bit—Determines if the F-bit is included in the CRC6
remainder calculation in T1 mode (T1/E1N = 1). This bit is ignored in E1 mode (T1/E1N = 0).
—
The processor must not write to the control registers until the reset process is complete.
• System bus outputs (RSIGO, RPCMO, and SIGFRZ) are three-stated.
• Programmable I/O pins are configured as inputs.
• Framer control registers are set to their default values.
0 = T1 ESF CRC6 calculation is performed on the
1 = TI ESF CRC6 transmit calculation is performed on
6
receive data including a 1 in place of the F-bit.
receive data including the F-bit.
RINCF
5
RFRAME[3]
4
Conexant
RFRAME[2]
3
RFRAME[1]
2
3.3 Primary Control and Status Register
RFRAME[0]
1
Table
3.0 Registers
3-4). The
T1/E1N
0
3-11