cx28394 Conexant Systems, Inc., cx28394 Datasheet - Page 50

• Manufacturer Part Number: cx28394
• Description: Quad/x16/octal-t1/e1/j1 Framers
• Manufacturer: Conexant Systems, Inc.

1.0 Product Description
1.2 Pin Assignments
Table 1-6. Hardware Signal Definitions (2 of 9)
1-32
CS*
DS*(RD*)
R/W* (WR*)
ONESEC
ONESEC1
ONESEC2
INTR*
INTR1*
INTR2*
DTACK*
DTACK1*
DTACK2*
Pin Label
Chip Select
Data Strobe or
Read Strobe
Read/Write
Direction or
Write Strobe
One Second
Timer
One Second
Timer
Interrupt
Request
Interrupt
Request
Data Transfer
Acknowledge
Data Transfer
Acknowledge
Signal Name
Microprocessor Interface (MPU) (Continued)
Device
4, 5, 8
4, 5, 8
4, 8
4, 8
4, 8
4, 8
5
5
5
(1)
Conexant
PIO
PIO
I/O
O
O
O
O
I
I
I
Active-low enables read/write decoder. Active high ends
current read or write cycle and places data bus output in
high impedance.
Active-low read data strobe (RD*) for MOTO* = 1, or
data strobe (DS* ) for MOTO* = 0.
Active-low write data strobe (WR*) for MOTO* = 1, or
data select (R/W* ) for MOTO* = 0.
Controls or marks one-second interval used for status
reporting. When input, the timer is aligned to ONESEC
rising edge. When output, rising edge indicates start of
each one-second interval.
Controls or marks one-second interval used for status
reporting. When input, the timer is aligned to ONESEC
rising edge. When output, rising edge indicates start of
each one-second interval. ONESEC1 is the one second
timer for framers 1 to 8, ONESEC2 is the one second
timer for framers 9 to 16.
Open drain active low output signifies one or more
pending interrupt requests. INTR* goes to
high-impedance state with weak (>50 k ) internal pullup
resistance after processor has serviced all pending
interrupt requests.
Open drain active low output signifies one or more
pending interrupt requests. INTRn* goes to
high-impedance state with weak (>50k ) internal pullup
resistance after processor has serviced all pending
interrupt requests. INTR1* is the interrupt request for
framers 1 to 8, INTR2* is the interrupt request for
framers 9 to 16.
Open drain active low output signifies in-progress data
transfer cycle. DTACK* remains asserted (low) for as
long as AS* and CS* are both active-low.
Open drain active low output signifies in-progress data
transfer cycle. DTACKn* remains asserted (low) for as
long as AS* and CSn* are both active-low.
Quad/x16/Octal—T1/E1/J1 Framers
Definition
CX28394/28395/28398
100054E