cx28394 Conexant Systems, Inc., cx28394 Datasheet - Page 119
cx28394
Manufacturer Part Number
cx28394
Description
Quad/x16/octal-t1/e1/j1 Framers
Manufacturer
Conexant Systems, Inc.
Datasheet
1.CX28394.pdf
(305 pages)
- Current page: 119 of 305
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CX28394/28395/28398
Quad/x16/Octal—T1/E1/J1 Framers
Figure 2-29. Serial Interface Timing Diagram
100054E
SERCLK
SERCLK
SERCS*
SERCS*
SERDO
SERDO
SERDI
SERDI
R/W A0
R/W A0
2.7 Serial Interface
The device provides a serial interface that allows the microprocessor to indirectly
communicate with an attached LIU (such as the Conexant CX28380 Quad T1/E1
LIU). This interface allows the microprocessor to control and query the LIU
status. One 8-bit register in the LIU can be written via the SERDO pin or read
from the SERDI pin at the clock rate determined by the SERCKO clock output.
The serial interface supports a glueless interface to two quad LIUs by supplying
two independently controlled external chip select lines on the CX28398:
SERCS1* and SERCS2*. The CX28394 provides a single SERCS* chip select
line. On the CX28395, the serial interface is not accessable.
During a write operation, a 16-bit word
and [SER_DAT; addr 023]
contains the LIU register address for the current operation and a read/write
control bit. During a read operation, SER_CTL is transmitted and 8-bit data from
the LIU is received and placed in SER_DAT register. Writing to SER_CTL
initiates a serial interface read or write operation.
content is written to the SERDO serial port on the eight SERCKO cycles
immediately following the Address/Command byte. Likewise, for the read
operation, data on the SERDI serial port is input immediately on the eight
SERCKO clock cycles following the Address/Command byte.
The serial interface uses a 16-bit process for each write or read operation.
The Data register contains either write or read data. For the write operation, its
Figure 2-29
A1
A1
A2
A2
A3
A3
illustrates serial interface timing.
A4
A4
Conexant
Read Timing
Write Timing
A5
A5
—
A6
A6
is transmitted to the LIU. The SER_CTL register
D0
D0
D1
D1
—
D2
D2
consisting of [SER_CTRL; addr 022]
D3
D3
D4
D4
D5
D5
D6
D6
2.0 Circuit Description
D7
D7
2.7 Serial Interface
2-61
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