cx28394 Conexant Systems, Inc., cx28394 Datasheet - Page 219
cx28394
Manufacturer Part Number
cx28394
Description
Quad/x16/octal-t1/e1/j1 Framers
Manufacturer
Conexant Systems, Inc.
Datasheet
1.CX28394.pdf
(305 pages)
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CX28394/28395/28398
Quad/x16/Octal—T1/E1/J1 Framers
RSBI[1:0]
Unused bits are reserved and should be written to 0.
OFFSET[2:0]
100054E
0D2—RSB Sync Bit Offset (RSYNC_BIT)
—
7
Receive Slip Buffer Interface Mode—Selects configuration of RSLIP buffer. RSBI determines
the total buffer depth and initial delay conditions. While RSLIP is bypassed, RSB outputs and
RSBCKI is ignored. RFSYNC and RMSYNC are also ignored in bypass mode if they are
programmed as inputs.
RSB Sync Bit Offset—Selects which RSB bit number coincides with RFSYNC and RMSYNC
sync pulses. Sync pulses are programmed to align to one bit in relation to RPCMO, RSIGO,
RINDO, and SIGFRZ time slots. If the sync pulses are desired to coincide with location of T1
F-bit or time slot zero Bit 1, then OFFSET is programmed to equal zero. Sync bit offset is
added to time slot offset [RSYNC_TS; addr 0D3] to form a 10-bit OFFSET value. This value
applies to RFSYNC location, which is then added to frame offset [RSYNC_FRM; addr 0D8]
to form a 15-bit OFFSET value that applies to RMSYNC location. Both RFSYNC and
RMSYNC offsets are expressed as RSB.OFFSET, allowing the system to generate or accept
sync pulses at any bit location within the RSB multiframe.
—
6
RSBI
00
01
10
11
OFFSET[2:0]
Normal
Short
Elastic
Bypass
Mode
—
000
001
110
111
5
|
674 bits
Depth
2 Frame
2 Frame
0 bits
Total
—
4
Conexant
0.5 to 1.5 Frames
Initial Delay
1 Frame
32 bits
32 bits
0 bits
—
3
RSYNC Location
Bit 1 or F-bit
Bit 2
Bit 7
Bit 8
|
When RFSYNC is output
When RFSYNC is input
Reverts to normal upon slip
Recenters automatically upon slip
RSBCKI ignored
OFFSET[2]
2
Conditions
OFFSET[1]
3.16 System Bus Registers
1
3.0 Registers
OFFSET[0]
0
3-97
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