cx28394 Conexant Systems, Inc., cx28394 Datasheet - Page 231
cx28394
Manufacturer Part Number
cx28394
Description
Quad/x16/octal-t1/e1/j1 Framers
Manufacturer
Conexant Systems, Inc.
Datasheet
1.CX28394.pdf
(305 pages)
- Current page: 231 of 305
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CX28394/28395/28398
Quad/x16/Octal—T1/E1/J1 Framers
All system bus data, signaling, and controls are transferred through a set of internal RAMs that have parity error
detection capabilities. Any parity error that is detected during a RAM access is reported in PERR. Each error
event is latched active high and held until the processor read clears PERR. Parity errors are indicative of system
clock glitches (REFCKI, TSBCKI, or RSBCKI), a failing or excessively noisy power supply, or general circuit
failure.
PERR_TPC
PERR_RPC
PERR_SBC
INSERT
SIG_LP
RLOOP
RINDO
TINDO
100054E
0DD— RAM Parity Status (PERR)
0E0–0FF—System Bus Per-Channel Control (SBCn; n = 0 to 31)
—
—
7
7
TPC (Transmit) RAM Parity Error
RPC (Receive) RAM Parity Error
SBC (Control) RAM Parity Error
Insert RX Signaling on RPCMO—Enables per-channel signaling insertion on RPCMO output,
where ABCD signaling is supplied by RLOCAL signaling (RPCn; addr 180–19F) or buffered
signaling [RSIGn; addr 1A0–IBF]. INSERT is a lower priority than no signaling (SIG_OFF;
addr 0D1). RSB signaling frame locations are specified by RMSYNC signal in conjunction
with programmed frame offset [OFFSET; addr 0D8].
Local Signaling Loopback—RSIGO output signaling supplied from TSIGn buffer contents.
Local Loopback—RPCMO output data supplied from TSLIP buffer contents.
Activate RINDO Time Slot Indicator—Receive system bus time slots are individually marked
(active high for 8 bits) by RINDO. Note that SBI_OE (addr 0D0) overrides RINDO.
Activate TINDO Time Slot Indicator—Transmit system bus time slots are individually marked
(active high for 8 bits) by TINDO.
INSERT
—
0 = normal
1 = local signaling loopback
0 = normal
1 = local loopback
0 = RINDO signal inactive (low)
1 = RINDO signal active (high)
0 = TINDO inactive
1 = TINDO active
6
6
SIG_OFF
1
0
0
SIG_LP
—
5
5
INSERT
X
1
1
RLOCAL
RLOOP
—
4
4
X
0
1
Conexant
None
ABCD from RSIGn output buffer
ABCD from RPCn local buffer
RINDO
—
3
3
RPCMO Inserted Signal
PERR_TPC
TINDO
2
2
PERR_RPC
TSIG_AB
3.16 System Bus Registers
1
1
3.0 Registers
PERR_SBC
ASSIGN
0
0
3-109
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