MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 101

• Manufacturer Part Number: MC68HC908JG16FA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

8.4.2 Active Resets from Internal Sources
MC68HC908JG16
MOTOROLA
NOTE:
—
Rev. 1.0
All internal reset sources actively pull the RST pin low for 32 OSCDCLK
cycles to allow resetting of external peripherals. The internal reset signal
IRST continues to be asserted for an additional 32 cycles. (See
8-5.) An internal reset can be caused by an illegal address, illegal
opcode, COP timeout, LVI, the USB module or POR. (See
Sources of Internal
For LVI or POR resets, the SIM cycles through 4096 OSCDCLK cycles
during which the SIM forces the RST pin low. The internal reset signal
then follows the sequence from the falling edge of RST shown in
Figure
The COP reset is asynchronous to the bus clock.
The active reset feature allows the part to issue a reset to peripherals
and other chips within a system built around the MCU.
OSCDCLK
Freescale Semiconductor, Inc.
IRST
RST
IAB
For More Information On This Product,
8-5.
System Integration Module (SIM)
Go to: www.freescale.com
Figure 8-6. Sources of Internal Reset
RST PULLED LOW BY MCU
ILLEGAL ADDRESS RST
Figure 8-5. Internal Reset Timing
ILLEGAL OPCODE RST
Reset.)
COPRST
32 CYCLES
POR
USB
LVI
INTERNAL RESET
System Integration Module (SIM)
32 CYCLES
Reset and System Initialization
VECTOR HIGH
Figure 8-6 .
Technical Data
Figure
101