MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 259

• Manufacturer Part Number: MC68HC908JG16FA
• Description: Microcontrollers
• Manufacturer: MOTOROLA [Motorola, Inc]

14.3.2 Data Direction Register A
MC68HC908JG16
MOTOROLA
NOTE:
—
Rev. 1.0
* DDRA7 bit is reset by POR or LVI reset only.
Address:
AD7–AD0 — Analog-to-Digital Input Pins
Data direction register A determines whether each port A pin is an input
or an output. Writing a logic 1 to a DDRA bit enables the output buffer for
the corresponding port A pin; a logic 0 disables the output buffer.
DDRA[7:0] — Data Direction Register A Bits
Avoid glitches on port A pins by writing to the port A data register before
changing data direction register A bits from 0 to 1.
Figure 14-4
Reset:
Read:
Write:
AD7–AD0 are pins used for the input channels to the analog-to-digital
converter module. The channel select bits, ADCH[4:0], in the ADC
status and control register (ADSCR) define which port A pin will be
used as an ADC input and overrides any control from the port I/O or
keyboard interrupt logic. (See
Converter
These read/write bits control port A data direction. Reset clears
DDRA[7:0], configuring all port A pins as inputs.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = Corresponding port A pin configured as output
0 = Corresponding port A pin configured as input
DDRA7
$0004
Bit 7
0*
Figure 14-3. Data Direction Register A (DDRA)
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shows the port A I/O logic.
Input/Output (I/O) Ports
(ADC).)
DDRA6
6
0
DDRA5
5
0
DDRA4
Section 13. Analog-to-Digital
4
0
DDRA3
3
0
DDRA2
2
0
Input/Output (I/O) Ports
DDRA1
1
0
Technical Data
DDRA0
Bit 0
Port A
0
259