MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 66
MC68HC908JG16FA
Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
1.MC68HC908JG16FA.pdf
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FLASH Memory
4.9.1 Variables
4.9.2 ERASE Routine
Technical Data
66
NOTE:
The ROM-resident routines use three variables: CTRLBYT, CPUSPD
and LADDR; and one data buffer. The minimum size of the data buffer
is one byte and the maximum size is 64 bytes.
CPUSPD must be set before calling the erase or programming routines,
and should be set to four times the value of the CPU internal bus speed
in MHz. For example: for CPU speed of 6MHz, CPUSPD should be set
to 24.
The ERASE routine erases the entire or a block of FLASH memory. The
routine does not check for a blank range before or after erase.
A block erase cannot be performed on the last block of FLASH memory
(user vector at $FFD0)–$FFFF).
CTRLBYT
DATABUF
Freescale Semiconductor, Inc.
CPUSPD
Variable
LADDR
Routine
Calling Address
Stack Use
Input
For More Information On This Product,
Table 4-2. Summary of FLASH Routine Variables
Go to: www.freescale.com
$008A–$008B
$0100–$013F
FLASH Memory
Address
$0088
$0089
ERASE
$FC06
5 Bytes
CPUSPD — CPU speed
HX —
CTRLBYT — Mass or block erase
Table 4-3. ERASE Routine
Control byte for setting mass or block erase.
Timing adjustment for different CPU speeds.
Last FLASH address to be programmed.
Data buffer for programming and verifying.
Mass erase if bit 6 = 1
Block erase if bit 6 = 0
Contains any address in the range to be
erased
Description
MC68HC908JG16
MOTOROLA
—
Rev. 1.0
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