MC68HC908JG16FA MOTOROLA [Motorola, Inc], MC68HC908JG16FA Datasheet - Page 98

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MC68HC908JG16FA

Manufacturer Part Number
MC68HC908JG16FA
Description
Microcontrollers
Manufacturer
MOTOROLA [Motorola, Inc]
Datasheet
System Integration Module (SIM)
8.3 SIM Bus Clock Control and Generation
Technical Data
98
Note: Writing a logic 0 clears SBSW.
Addr.
$FE00
$FE01
$FE03
$FE04
$FE05
$FE06
SIM Break Status Register
SIM Reset Status Register
Interrupt Status Register 1
Interrupt Status Register 2
Interrupt Status Register 3
SIM Break Flag Control
Register Name
(SBFCR)
Register
(SBSR)
(SRSR)
(INT1)
(INT2)
(INT3)
The bus clock generator provides system clock signals for the CPU and
peripherals on the MCU. The system clocks are generated from an
incoming clock, OSCOUT, as shown in
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
POR:
Freescale Semiconductor, Inc.
Figure 8-2. SIM I/O Register Summary
For More Information On This Product,
BCFE
Bit 7
POR
IF14
IF6
R
R
R
R
1
0
0
0
0
0
System Integration Module (SIM)
Go to: www.freescale.com
FROM OSC
IF13
PIN
IF5
R
R
R
R
R
6
0
0
0
0
0
Figure 8-3. SIM Clock Signals
COP
IF12
IF4
R
R
R
R
R
5
0
0
0
0
0
OSCDCLK
OSCOUT
ILOP
IF11
IF3
R
R
R
R
R
4
0
0
0
0
0
÷ 2
SIM COUNTER
Figure
ILAD
IF10
IF2
SIM
R
R
R
R
R
3
0
0
0
0
0
GENERATORS
MC68HC908JG16
8-3.
BUS CLOCK
USB
IF1
IF9
R
R
R
R
R
2
0
0
0
0
0
See note
SBSW
LVI
IF8
R
R
R
R
1
0
0
0
0
0
0
0
MOTOROLA
Rev. 1.0
Bit 0
IF15
IF7
R
R
R
R
R
0
0
0
0
0
0

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